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SN8F27E64KB Datasheet(PDF) 13 Page - SONiX Technology Company

Part # SN8F27E64KB
Description  8-Bit Flash Micro-Controller with Embedded ICE and ISP
PDF  192 Pages
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Manufacturer  SONIX [SONiX Technology Company]
Direct Link  http://www.sonix.com.tw
Logo SONIX - SONiX Technology Company

SN8F27E64KB Datasheet(HTML) 13 Page - SONiX Technology Company

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SN8F27E60 Series
8-Bit Flash Micro-Controller with Embedded ICE and ISP
SONiX TECHNOLOGY CO., LTD
Page 13
Version 1.4
1.4 PIN DESCRIPTIONS
PIN NAME
TYPE
DESCRIPTION
VDD, VSS
P
Power supply input pins for digital and analog circuit.
VDDL
P
Low voltage power pin. Connect 0.1uF capacitor to Vss.
AVREFH
P
ADC high reference voltage input pin.
RST/P0.4
I/O
RST: System external reset input pin. Schmitt trigger structure, ac
tive “low”, normal stay to “high”.
P0.4: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up.
XIN/P0.6
I/O
XIN: Oscillator input pin while external oscillator enable (crystal and RC).
P0.6: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up.
XOUT/P0.5
I/O
XOUT: Oscillator output pin while external crystal enable.
P0.5: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up.
P0.0/INT0/
TC0
I/O
P0.0: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up.
INT0: External interrupt 0 input pin.
TC0: TC0 event counter input pin.
P0.1/INT1/
TC1
I/O
P0.1: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up.
INT1: External interrupt 1 input pin.
TC1: TC1 event counter input pin.
P0.2/URX/
TC2
I/O
P0.2: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
TC2: TC2 event counter input pin.
URX: UART receive input pin.
P0.3/UTX/T1
I/O
P0.3: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
UTX: UART transmit output pin.
T1: T1 event counter input pin.
P1.0/EICK
I/O
P1.0: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
EICK: Embedded ICE clock pin.
P1.1/EIDA
I/O
P1.1: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
EIDA: Embedded ICE data pin.
P1.2/SDA
I/O
P1.2: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
SDA: MSP data pin.
P1.3/SCL
I/O
P1.3: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
SCL: MSP clock pin.
P1.4/SDO
I/O
P1.4: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
SDO: SIO data output pin.
P1.5/SDI
I/O
P1.5: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
SDI: SIO data input pin.
P1.6/SCK
I/O
P1.6: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
SCK: SIO clock pin.
P1.7/SCS
I/O
P1.7: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level change
wake-up. Programmable open-drain structure.
SCS: SIO bus control pin.
P4.0/AIN0
I/O
P4.0: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters.
AIN0: ADC channel 0 input pin.
P4.1/AIN1
I/O
P4.1: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters.
AIN1: ADC channel 1 input pin.
P4.2/AIN2
I/O
P4.2: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters.
AIN2: ADC channel 2 input pin.
P4.3/AIN3
I/O
P4.3: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters.
AIN3: ADC channel 3 input pin.
P4.4/AIN4
I/O
P4.4: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters.



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