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RT8101GS Datasheet(PDF) 12 Page - Richtek Technology Corporation

Part # RT8101GS
Description  12V Synchronous Buck PWM DC-DC
PDF  15 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT8101GS Datasheet(HTML) 12 Page - Richtek Technology Corporation

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12
RT8101/A
Preliminary
www.richtek.com
DS8101/A-01 March 2007
3) Input Capacitor
The selection of input capacitor is mainly based on its
maximum ripple current capability. The buck converter
draws pulsewise current from the input capacitor during
the on time of S1 as shown in Figure 8. The RMS value of
ripple current flowing through the input capacitor is
described as :
(6)
The input capacitor must be capable of handling this ripple
current. Sometimes, for higher efficiency the low ESR
capacitor is necessarily.
(A)
D)
-
D(1
I
rms
I
OUT
=
Figure 9. The related waveforms of output capacitor
2) Output Capacitor
The selection of output capacitor depends on the output
ripple voltage requirement. Practically, the output ripple
voltage is a function of both capacitance value and the
equivalent series resistance (ESR) rC. Figure 9 shows
the related waveforms of output capacitor.
The AC impedance of output capacitor at operating
frequency is quite smaller than the load impedance, so
the ripple current (
ΔIL) of the inductor current flows mainly
through output capacitor. The output ripple voltage is
described as :
where
ΔVOR is caused by ESR and ΔVOC by capacitance.
For electrolytic capacitor application, typically 90 to 95%
of the output voltage ripple is contributed by the ESR of
output capacitor. So Equation (4) could be simplified as :
ΔVOUT = ΔIL x rC
Users could connect capacitors in parallel to get calculated
ESR.
(2)
(3)
(4)
(5)
OUT
OR
OC
t2
C
OUT
L
C
t1
O
2
OUT
OUT
L
L
C
S
OL
V
V
V
1
V
I
r
I dt
C
1V
V
I
I
r
(1 D)T
8C
Δ= Δ
+ Δ
Δ= Δ
×
+
Δ= Δ
× Δ
×
+
−
∫
L
dt
=
dt
L
VOUT
=
VOR
IL
IC
dIL
ΔIL
1/2
0
0
ΔIL x rC
VOC
t1
t2
ΔVOC
ΔIL
VIN-VOUT
TS
IOUT
dIL
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature 125
°C. The
maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = ( TJ(MAX)
− TA ) / θJA
Where TJ(MAX) is the maximum operation junction
temperature 125
°C, TAis the ambient temperature and the
θJA is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8101/A, where TJ(MAX) is the maximum junction
temperature of the die (125
°C) and TA is the maximum
ambient temperature. The junction to ambient thermal
resistance
θJA is layout dependent.
The maximum power dissipation at TA = 25
°C can be
calculated by following formula :
PD(MAX) = ( 125
°C − 25°C) / (120°C/W) = 0.83W for
SOP-8 packages
PD(MAX) = ( 125
°C − 25°C) / (75°C/W) = 1.33W for
PSOP-8 packages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ (MAX) and thermal
resistance
θJA. For RT8101/A packages, Figure 10 allows
the designer to see the effect of rising ambient temperature
on the maximum power allowed.



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