King Billion Electronics Co., Ltd

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子

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HF88M32B

January 16, 2004

11

V1.11

This specification is subject to change without notice. Please contact sales person for the latest version before use.

7.2.

Interrupted by I/O when Loading Address Counter

CEn

WEn

OEn

P0_Data

D[7:0]

Internal

Memory

Address

AC0

3Dh

00h

xxxx3Dh

55h

ZZ

ZZ

BBh

78h

xx783Dh

00783Dh

Interrupted by I/O when Loading Address Counter

P0_DIR

P1_Data

P1_DIR

RS[2:0]

000b

101b

111b

100b

110b

00h

00h

FFh

00h

FFh

FFh

FFh

000b

00h

AC1

AC2

t

ORL

t

ACER

t

ORH

7.3.

Setting and Reading the I/O Mode for P0 and P1

CE n

WE n

OE n

P 0_D a ta

D [7:0]

F0 h

F 0 h

0F h

ZZ

ZZ

S e tting a n d R e a d in g th e I /O M o de fo r P 0 a nd P 1

P 0_D I R

P 1_D a ta

P 1_D I R

RS [ 2 :0 ]

101b

111b

0F h

FF h

0F h

00h

FF h

00h

t

ORL

t

AC E R

000b

F0 h

101b

111b

t

ORH