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LTC3426 Datasheet(PDF) 4 Page - Linear Technology |
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LTC3426 Datasheet(HTML) 4 Page - Linear Technology |
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4 / 12 page ![]() 4 LTC3426 3426fa PI FU CTIO S SW (Pin 1): Switch Pin. Connect inductor between SW and VIN. A Schottky diode is connected between SW and VOUT. Keep these PCB trace lengths as short and wide as possible to reduce EMI and voltage overshoot. If the inductor current falls to zero, an internal 100 Ω antiringing switch is connected from SW to VIN to minimize EMI. GND (Pin 2): Signal and Power Ground. Provide a short direct PCB path between GND and the (–) side of the output capacitor(s). FB (Pin 3): Feedback Input to the gm Error Amplifier. Connect resistor divider tap to this pin. The output voltage can be adjusted from 2.5V to 5V by: V R R OUT =+ ⎛ ⎝⎜ ⎞ ⎠⎟ 122 1 1 2 .• SHDN (Pin 4): Logic Controlled Shutdown Input. SHDN = High: Normal free running operation SHDN = Low: Shutdown, quiescent current < 1 µA Typically, SHDN should be connected to VIN through a 1M pull-up resistor. VOUT (Pin 5): Output Voltage Sense Input. The NMOS switch gate drive is derived from the greater of VOUT and VIN. VIN (Pin 6): Input Supply. Must be locally bypassed. BLOCK DIAGRA Figure 1 4 SHUTDOWN AND SOFT-START 1.22V REFERENCE RAMP GENERATOR 1.2MHz OSCILLATOR 3426 F01 PWM LOGIC AND DRIVER Σ – + 3 FB FB VOUT SHDN SW A1 – + A2 RC R2 (EXTERNAL) R1 (EXTERNAL) 0.02 Ω CC 1 GND 2 VIN 6 VOUT COMPARATOR 5 |
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