LPC2142 datasheet(24/39 Pages) NXP

24 / 39 page

LPC2141_42_44_46_48_3

Product data sheet

Rev. 03 — 19 October 2007

24 of 39

NXP Semiconductors

LPC2141/42/44/46/48

Single-chip 16-bit/32-bit microcontrollers

6.20 Emulation and debugging

The LPC2141/42/44/46/48 support emulation and debugging via a JTAG serial port. A

trace port allows tracing program execution. Debugging and trace functions are

multiplexed only with GPIOs on Port 1. This means that all communication, timer and

interface peripherals residing on Port 0 are available during the development and

debugging phase as they are when the application is run in the embedded system itself.

6.20.1 EmbeddedICE

Standard ARM EmbeddedICE logic provides on-chip debug support. The debugging of

the target system requires a host computer running the debugger software and an

EmbeddedICE protocol convertor. EmbeddedICE protocol convertor converts the remote

debug protocol commands to the JTAG data needed to access the ARM core.

The ARM core has a Debug Communication Channel (DCC) function built-in. The DCC

allows a program running on the target to communicate with the host debugger or another

separate host without stopping the program ﬂow or even entering the debug state. The

DCC is accessed as a co-processor 14 by the program running on the ARM7TDMI-S

core. The DCC allows the JTAG port to be used for sending and receiving data without

affecting the normal program ﬂow. The DCC data and control registers are mapped in to

addresses in the EmbeddedICE logic.

6.20.2 Embedded trace

Since the LPC2141/42/44/46/48 have signiﬁcant amounts of on-chip memory, it is not

possible to determine how the processor core is operating simply by observing the

external pins. The Embedded Trace Macrocell (ETM) provides real-time trace capability

for deeply embedded processor cores. It outputs information about processor execution to

the trace port.

The ETM is connected directly to the ARM core and not to the main AMBA system bus. It

compresses the trace information and exports it through a narrow trace port. An external

trace port analyzer must capture the trace information under software debugger control.

Instruction trace (or PC trace) shows the ﬂow of execution of the processor and provides a

list of all the instructions that were executed. Instruction trace is signiﬁcantly compressed

by only broadcasting branch addresses as well as a set of status signals that indicate the

pipeline status on a cycle by cycle basis. Trace information generation can be controlled

by selecting the trigger resource. Trigger resources include address comparators,

counters and sequencers. Since trace information is compressed the software debugger

requires a static image of the code being executed. Self-modifying code can not be traced

because of this restriction.

6.20.3 RealMonitor

RealMonitor is a conﬁgurable software module, developed by ARM Inc., which enables

real-time debug. It is a lightweight debug monitor that runs in the background while users

debug their foreground application. It communicates with the host using the DCC, which is

present in the EmbeddedICE logic. The LPC2141/42/44/46/48 contain a speciﬁc

conﬁguration of RealMonitor software programmed into the on-chip ﬂash memory.

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