All trademarks mentioned in this document

are trademarks of their respective owners.

Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.

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http://www.DigitalCoreDesign.com

http://www.dcd.pl

Full prioritized interrupt system controls

Fully

programmable

serial-interface

characteristics:

5-, 6-, 7-, or 8-bit characters

Even, odd, or no-parity bit generation and

detection

1-, 1½-, or 2-stop bit generation

Baud generation

Complete status reporting capabilities

Line break generation and detection.

Internal diagnostic capabilities:

Loop-back controls for communications link

fault isolation

Break, parity, overrun, framing error

simulation

Technology independent HDL Source

Code

Fully synthesizable static design with no

internal tri-state buffers

APPLI C ATIONS

Serial Data communications applications

Modem interface

DELIVERABLES

Source code:

VHDL Source Code or/and

VERILOG Source Code or/and

Encrypted, or plain text EDIF netlist

VHDL & VERILOG test bench

environment

Active-HDL automatic simulation macros

ModelSim automatic simulation macros

Tests with reference responses

Technical documentation

Installation notes

HDL core specification

Datasheet

Synthesis scripts

Example application

Technical support

IP Core implementation support

3 months maintenance

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Delivery the IP Core updates, minor

and major versions changes

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Delivery the documentation updates

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Phone & email support

LICENSING

Comprehensible and clearly defined licensing

methods without royalty fees make using of IP

Core easy and simply.

Single Design

license allows use IP Core in

single

FPGA

bitstream

and

ASIC

implementation.

Unlimited Designs, One Year

licenses allow

use IP Core in unlimited number of FPGA

bitstreams and ASIC implementations.

In all cases number of IP Core instantiations

within a design, and number of manufactured

chips are unlimited. There is no time

restriction except One Year license where

time of use is limited to 12 months.

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Single Design license for

VHDL, Verilog source code called HDL

Source

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Encrypted, or plain text EDIF called Netlist

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One Year license for

Encrypted Netlist only

Unlimited Designs license for

HDL Source

Netlist

Upgrade from