ADF5612 datasheet(24/48 Pages) AD

24 / 48 page

Data Sheet

ADF5612

APPLICATIONS INFORMATION

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Rev. 0 | 24 of 48

POWER-UP AND INITIALIZATION SEQUENCE

The following steps describe the recommended power-up and initi-

alization sequence of the ADF5612:

1. Apply specified voltages to the 5V and 3.3V power supply pins.

The ADF5612 is in full power-down mode at this point and SPI

programming is not possible.

2. Set the CEN pin (Pin 44) to a logic high.

3. After waiting ≥200μs for all SPI register bits to settle to their

power-on reset (POR) state, begin programming the SPI to

configure the ADF5612 to a desired state. The following is the

recommended SPI programming sequence:

a. Set the SDO_ACTIVE bit (Register 0x000, Bit 3) and the

CMOS_OV bit (Register 0d035, Bit 5) to a desired state for

future readback operations.

b. Program all required register addresses. The ordering of

programming does not matter except to ensure that Reg-

ister 0x010 is the last register write. There are several

required reserved register field settings provided in Table 16

that are required for proper device operation.

4. The ADF5612 remains in power-down mode until the PD_ALL

bit (Register 0x027, Bit 7) is programmed to 0.

5. A write to Register 0x010 starts a VCO autocalibration. At this

point, the ADF5612 is fully operational, and new frequencies

can be programmed as often as desired. The following steps

are information for the PD_ALL bit and the CEN pin.

6. Setting PD_ALL to 1 powers down the ADF5612, retaining

the latest programmed SPI settings and full SPI programming

capability.

7. If only the state of PD_ALL was modified in Step 6, setting

PD_ALL to 0 returns the ADF5612 to the frequency program-

med in Step 5. After a 10μs wait, all circuit blocks are complete-

ly powered up internally. This 10μs wait does not include the

frequency settling time associated with the loop filter bandwidth.

8. Toggling the CE pin level causes the ADF5612 to return to

full power-down mode and return the SPI registers to the POR

state (see Step 2 and Step 3).

Figure 52. Power-Up and Initialization

Programming Procedure

There are two different methods to power up the ADF5612. The

most commonly used method is provided in the Standard Power-Up

and Initialization Sequence, Automatic VCO Calibration section that

is mandatory at the initial device power-up.

The method provided in the Fast Power-Up and Initialization, Man-

ually Programmed VCO Calibration Settings section is an optional

power-up procedure after the initial power-up.

Standard Power-Up and Initialization

Sequence, Automatic VCO Calibration

The following standard power-up and initialization sequence is the

recommended procedure to power up and program the ADF5612:

1. Follow Step 1 through Step 5 in the Power-Up and Initialization

Sequence section.

2. It is optional to monitor the status of the VCO calibration

bits, ADC_BUSY and FSM_BUSY (Register 0x048, Bit 2

and Bit 1, respectively). A VCO calibration is completed

when ADC_BUSY transitions from high to low followed by

FSM_BUSY transitioning from high to low.

3. After the VCO calibration is complete, disable the VCO calibra-

tion clocks by setting EN_DNCLK (Register 0x01E, Bit 4) =

EN_ADC_CLK (Register 0x02C, Bit 3) = 0. Disabling the VCO

calibration clocks reduces unwanted spurious content.

4. The PLL is locked when the lock detector sets the LOCKED bit

(Register 0x48, Bit 0) to high.

5. When changing the frequency, take the following steps:

a. Program only the modified registers.

b. Write to Register 0x010 to start a new VCO autocalibration

as the final step whether it is modified or not.

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