Ultra-Low-Power Wi-Fi + Bluetooth® LE Combo Module

R19DS0155EK0305 Rev.3.6

Feb 17, 2025

CFR0011-120-00

Page 14

Figure 4. TIS 3D

Figure 5. TRP 3D

5.7

ESD Ratings

Table 14. ESD performance

Reliability test

Standards

Test conditions

Result

Human Body Model (HBM)

ANSI/ESDA/JEDEC JS-001-2017

± 2,000 V

Pass

Charge Device Model (CDM)

ANSI/ESDA/JEDEC JS-002-2018

± 500 V

Pass

5.8

Clock Electrical Characteristics

The DA16200MOD has two clock sources, one is the 32.768 kHz clock used by the RTC block and the other is

the 40 MHz clock for the internal processor and Wi-Fi system. More specifically, the 40 MHz clock is used as a

source clock for the internal PLL while the PLL output is used for the internal processor and Wi-Fi system block.

5.8.1

RTC Clock Source

The 32.768 kHz RTC clock source is needed for the free-running counter in the RTC block. The RTC block of

the SoC contains an internal 32.768 kHz RC oscillator as well, which is used as a clock for chip initialization

before the external 32.768 kHz crystal reaches the stable time in the initial stage. It is needed to convert it into

an external clock for accurate clock counting after the initialization stage. This process is executed through the

register setting.

5.8.2

Main Clock Source

The DA16200MOD contains a crystal oscillator for the main clock source which supports the external crystal

clock. Basically, the external clock is 40 MHz.