DS89C21

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SNLS091C – JUNE 1998 – REVISED APRIL 2013

DS89C21 Differential CMOS Line Driver and Receiver Pair

Check for Samples: DS89C21

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FEATURES

DESCRIPTION

The DS89C21 is a differential CMOS line driver and

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•

Meets TIA/EIA-422-A (RS-422) and CCITT V.11

receiver pair, designed to meet the requirements of

Recommendation

TIA/EIA-422-A

(RS-422)

electrical

characteristics

•

LOW POWER Design—15 mW Typical

interface standard. The DS89C21 provides one driver

•

Guaranteed AC Parameters:

and one receiver in a minimum footprint. The device

is offered in an 8-pin SOIC package.

–

Maximum Driver Skew 2.0 ns

The CMOS design minimizes the supply current to 6

–

Maximum Receiver Skew 4.0 ns

mA, making the device ideal for use in battery

•

Extended Temperature Range:

−40°C to

powered or power conscious applications.

+85°C

The driver features a fast transition time specified at

•

Available in SOIC Packaging

2.2 ns, and a maximum differential skew of 2 ns

•

Operates over 20 Mbps

making the driver ideal for use in high speed

•

Receiver OPEN Input Failsafe Feature

applications operating above 10 MHz.

The receiver can detect signals as low as 200 mV,

and also incorporates hysteresis for noise rejection.

Skew is specified at 4 ns maximum.

The DS89C21 is compatible with TTL and CMOS

levels (DI and RO).

Connection Diagram

See Package Number D (R-PDSO-G8)

Truth Table Driver

Input

Outputs

DI

DO

DO*

H

H

L

L

L

H

Truth Table Receiver

Inputs

Output

RI–RI*

RO

VDIFF ≥ +200 mV

H

VDIFF ≤ −200 mV

L

OPEN(1)

H

(1)

Non-terminated

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PRODUCTION DATA information is current as of publication date.

Copyright © 1998–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.