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SC561 Datasheet(PDF) 10 Page - Semtech Corporation

Part # SC561
Description  Dual Output Low Noise LDO Linear Regulator
PDF  15 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC561 Datasheet(HTML) 10 Page - Semtech Corporation

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SC561
10
General Description
The SC561 is a dual output linear regulator device
intended for applications where low dropout voltage, low
supply current, and low output noise are critical. The
device provides a simple, low cost solution for two
separate regulated outputs. Minimal PCB area is required
due to the miniature package size and the need for only
four external capacitors.
The linear regulators LDOA and LDOB are powered from
a single input supply rail, and each provides up to 300mA
of output current. The SC561 provides output voltages in
the range 1.2V to 3.3V. Available voltage values are shown
in the Voltage Options table on page 2.
Power On Control
The SC561 device has a single enable pin (EN) that controls
both LDO outputs. Pulling this pin low causes the device
to enter a low power shutdown mode where it typically
draws 100nA from the input supply.
The outputs of both LDOA and LDOB are enabled when
EN transitions high. When the output voltage of LDOA
reaches 87% of its regulation point, the delay timer starts
and the PGOOD signal transitions high after a delay of
200ms. The power up/down sequence is shown in the
timing diagram in Figure 1.
OUTA
PGOOD
EN
OUTB
tSU
87%
200ms
87%
Figure 1 — Timing Diagram
As PGOOD is an open-drain output, it can be left uncon-
nected when it is not in use without affecting the
performance of the device.
Dynamic Bias Control
The LOAD pin provides dynamic bias control which allows
the device to be operated in a low quiescent current
mode at light loads. At loads less than 2mA, the LOAD
pin should be pulled low in order to force the device into
an ultra-low quiescent current mode. When the load is
increased above 2mA, the LOAD pin should be pulled
high to ensure normal operation. This pin is a logic input,
therefore it must never be left unconnected. Figure 2
shows the quiescent current versus load current with
both LDOs enabled.
0
1
Io (mA)
1.4
1
1.2
0.8
0.6
0.4
0.2
0.1
0.01
10
100
1000
LOAD = H
Figure 2a - Quiescent Current versus Output Current
Io (mA)
1
0.1
0.01
10
100
1000
0.02
LOAD = L
0
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0.18
0.2
Figure 2b - Quiescent Current versus Output Current
Applications Information



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