ADS5413

SLWS153 − DECEMBER 2003

www.ti.com

5

PIN ASSIGNMENTS

14 15

D0 (LSB)

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11 (MSB)

36

35

34

33

32

31

30

29

28

27

26

25

16

1

2

3

4

5

6

7

8

9

10

11

12

AVDD

AGND

VINP

VINN

AGND

CML

AVDD

VREFB

VREFT

AVDD

AGND

NC

17 18 19 20

47 46 45 44 43

48

42

40 39 38

41

21 22 23 24

37

13

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(TOP VIEW)

THERMAL PAD

(Connect to GND Plane)

Terminal Functions

TERMINAL

NAME

NO.

I/O

DESCRIPTION

AVDD

1, 7, 10, 18,

40, 44, 45, 47

I

Analog power supply

AGND

2, 5, 11, 21,

41, 42, 43, 46

I

Analog ground

CLK

19

I

Clock input

CLKC

20

I

Complementary clock input

CML

6

O

Common-mode output voltage

D11−D0

25−36

O

Digital outputs, D11 is most significant data bit, D0 is least significant data bit.

DCA

24

I

Duty cycle adjust control. High = enable, low = disable, NC = enable

DECOUPLING

15

O

Decoupling pin. Add 0.1

µF to GND

NC

12, 14, 17, 37

Internally not connected

OGND

22, 39

I

Digital driver ground

OVDD

23, 38

I

Digital driver power supply

PWD

16

I

Power down. High = powered down, low = powered up, NC = powered up

REF SEL

48

I

Reference select. High = external reference, low = internal reference, NC = internal reference

VBG

13

O

Bandgap voltage output

VINN

4

I

Complementary analog input

VINP

3

I

Analog input

VREFB

8

I/O

Reference bottom

VREFT

9

I/O

Reference top