ADS5413

SLWS153 − DECEMBER 2003

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9

TYPICAL CHARACTERISTICS†

Figure 16

Duty Cycle − %

55

60

65

70

75

80

85

25

30

35

40

45

50

55

60

65

fS = 65 MSPS

fIN = 14 MHz

AC PERFORMANCE

vs

DUTY CYCLE

SFDR (DCA On)

SNR (DCA On)

SFDR (DCA Off)

SNR (DCA Off)

NOTE:

CLK 1.15-VPP square-wave differential

Clock Level − VPP‡

55

57

59

61

63

65

67

69

71

73

75

77

0

12345

6

fS = 65 MSPS

fIN = 190 MHz

AC PERFORMANCE

vs

CLOCK LEVEL

Figure 17

SFDR SE 3.3

‡ Measured from CLK to CLKC

SFDR SE 1.8

SFDR Diff 3.3

SFDR Diff 1.8

SNR SE 3.3

SNR SE 1.8

SNR Diff 1.8

SNR Diff 3.3

Figure 18

Clock Common Mode − V

60

64

68

72

76

80

84

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

AC PERFORMANCE

vs

CLOCK COMMON MODE

fS = 65 MSPS

fIN = 14 MHz

DCS On

SFDR

THD

SNR

SINAD

NOTE:

CLK 1-VPP square-wave differential

fIN − Input Frequency − MHz

58

60

62

64

66

68

70

0

50

100

150

200

250

SIGNAL-TO−NOISE RATIO

vs

INPUT FREQUENCY

fS = 65 MSPS

Figure 19

DCA On

BP Filter

DCA Off

BP Filter

DCA Off

No Filter

DCA On

No Filter

DCA Off

BP Filter

OVDD = 1.8 V

Figure 20

AVDD − Analog Supply Voltage − V

62

64

66

68

70

72

74

76

78

80

3.0

3.2

3.4

3.6

fS = 65 MSPS

fIN = 190 MHz

AC PERFORMANCE

vs

ANALOG SUPPLY VOLTAGE

SFDR

SNR

OVDD − Output Supply Voltage − V

63

64

65

66

67

68

69

70

71

72

73

1.8

2.0

2.2

2.4

2.6

2.8

3.0

3.2

3.4

3.6

fS = 65 MSPS

fIN = 190 MHz

AC PERFORMANCE

vs

OUTPUT SUPPLY VOLTAGE

SFDR

SNR

Figure 21

† 50% duty cycle. AVDD = 3.3 V, OVDD = 3.3 V, 25°C, DCA off, internal reference, Ain = –1 dBFS, CLK 2.8-VPP sine wave single ended, unless

otherwise noted