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IVC102 Datasheet(PDF) 2 Page - Texas Instruments |
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IVC102 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 15 page ![]() 2 ® IVC102 The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. NOTES: (1) Standard test timing: 1ms integration, 200 µs hold, 100µs reset. (2) Hold mode output voltage after 1ms integration of zero input current. Includes op amp offset voltage, integration of input error current and switch charge injection effects. SPECIFICATIONS At TA = +25°C, VS = ±15V, RL = 2kΩ, CINT = C1 + C2 + C3, 1ms integration period(1), unless otherwise specified. IVC102P, U PARAMETER CONDITIONS MIN TYP MAX UNITS TRANSFER FUNCTION V O = –(IIN)(TINT)/CINT Gain Error C INT = C1 + C2 + C3 ±5 +25/–17 % vs Temperature ±25 ppm/ °C Nonlinearity VO = ±10V ±0.005 % Input Current Range ±100 µA Offset Voltage(2) IIN = 0, CIN = 50pF –5 ±20 mV vs Temperature ±30 µV/°C vs Power Supply VS = +4.75/–10 to +18/–18V 150 750 µV/V Droop Rate, Hold Mode –1 nV/ µs OP AMP Input Bias Current S1, S2 Open –100 ±750 fA vs Temperature See Typical Curve Offset Voltage (Op Amp VOS) ±0.5 ±5mV vs Temperature ±5 µV/°C vs Power Supply V S = +4.75/–10 to +18/–18V 10 100 µV/V Noise Voltage f = 1kHz 10 nV/ √Hz INTEGRATION CAPACITORS C1 + C2 + C3 80 100 120 pF vs Temperature ±25 ppm/ °C C 1 10 pF C2 30 pF C3 60 pF OUTPUT Voltage Range, Positive RL = 2kΩ (V+)–3 (V+)–1.3 V Negative RL = 2kΩ (V–)+3 (V–)+2.6 V Short-Circuit Current ±20 mA Capacitive Load Drive 500 pF Noise Voltage See Typical Curve DYNAMIC CHARACTERISTIC Op Amp Gain-Bandwidth 2 MHz Op Amp Slew Rate 3V/ µs Reset Slew Rate 3V/ µs Settling Time, 0.01% 10V Step 6 µs DIGITAL INPUTS (TTL/CMOS Compatible) VIH (referred to digital ground) (Logic High) 2 5.5 V VIL (referred to digital ground) (Logic Low) –0.5 0.8 V IIH VIH = 5V 2 µA I IL V IL = 0V 0 µA Switching Time 100 ns POWER SUPPLY Voltage Range: Positive +4.75 +15 +18 V Negative –10 –15 –18 V Current: Positive 4.1 5.5 mA Negative –1.6 –2.2 mA Analog Ground –0.2 mA Digital Ground –2.3 mA TEMPERATURE RANGE Operating Range –40 85 °C Storage –55 125 °C Thermal Resistance, θ JA DIP 100 °C/W SO-14 150 °C/W |
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