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LP3918 Datasheet(PDF) 3 Page - Texas Instruments |
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LP3918 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 38 page ![]() LP3918 1 PF 1 PF 1 PF 10 PF 1 PF 1 PF 1 PF 1 PF 10 PF 10 PF 1.5 k: 1.5 k: VSS SDA PS_HOLD PWR_ON RESET_N SCL LDO2 LDO4 RX_EN GNDA LDO3 LDO2 LDO1 ACOK_N PON_N LDO7 LDO6 VIN2 TX_EN LDO5 IMON CHGIN BATT VIN1 HF_PWR TCXO_EN A5 B4 C4 B5 C5 D5 E5 A4 B2 C3 A3 B3 A1 A2 B1 C1 C2 D1 D2 E1 E2 D3 E3 E4 D4 VBATT VBATT VBATT LP3918 www.ti.com SNVS476D – AUGUST 2007 – REVISED MAY 2013 PIN DESCRIPTION (continued) Pin # Name Type(1) Description E1 LDO1 A LDO1 Output (CORE) E2 LDO2 A LDO2 Output (DIGI) E3 LDO3 A LDO3 Output (ANA) E4 LDO4 A LDO4 Output (TCXO) E5 VIN2 P Battery Input for LDO3 - 7 Applications Schematic Diagram Figure 3. Applications Schematic Device Description The LP3918 Charge Management and Regulator Unit is designed to supply charger and voltage output capabilities for mobile systems, e.g. CDMA handsets. The device provides a Li-Ion charging function and 7 regulated outputs. Communication with the device is via an I2C compatible serial interface that allows function control and status read-back. The battery charge management section provides a programmable CC/CV linear charge capability. Following a normal charge cycle a maintenance mode keeps battery voltage between programmable levels. Power levels are thermally regulated to obtain optimum charge levels over the ambient temperature range. Charger Features • Pre-charge, CC, CV and Maintenance modes • USB Charge 100mA/450mA • Integrated FET • Integrated Reverse Current Blocking Diode • Integrated Sense Resistor Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LP3918 |
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