0 dB

-180°

-360°

LOAD ZERO

1/(2S (ESR x CL)

LOAD POLE

1/(2S (ESR + RO // RL)CL)

ERROR AMP

POLE: ZPOLE

14

LP3982

SNVS185F – FEBRUARY 2002 – REVISED APRIL 2017

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Copyright © 2002–2017, Texas Instruments Incorporated

Figure 17. Loop Gain Bode Plot Illustrating Inadequately High Zero for Stability Compensation

The LP3982 generates an internal zero that makes up for the inadequately high zero of the low ESR ceramic

output capacitor. This internally generated zero is strategically placed to provide positive phase shift near unity

gain, thus providing a stable phase margin.

8.2.2.4 Input Capacitor

The LP3982 requires a minimum input capacitance of about 1 μF. The value may be increased indefinitely. The

type is not critical to stability. However, instability may occur with bench set-ups where long supply leads are

used, particularly at near dropout and high current conditions. This is attributed to the lead inductance coupling to

the output through the gate oxide of the pass transistor; thus, forming a pseudo LCR network within the loop

gain. A 10-μF tantalum input capacitor remedies this non-situ condition; its larger ESR acts to dampen the

pseudo-LCR network. This may only be necessary for some bench setups. A 1-μF ceramic input capacitor are

fine for most end-use applications.

If a tantalum input capacitor is intended for the final application, it is important to consider their tendency to fail in

short circuit mode, thus potentially damaging the part.

8.2.2.5 Noise Bypass Capacitor

The noise bypass capacitor (CC) significantly reduces output noise of the LP3982. It connects between pin 6 and

ground. The optimum value for CC is 33 nF.

Pin 6 directly connects to the high impedance output of the bandgap. The DC leakage of the CC capacitor must

be considered; loading down the reference reduces the output voltage. NPO and COG ceramic capacitors

typically offer very low leakage. Polypropylene and polycarbonate film carbonate capacitor offer even lower

leakage currents.

CC does not affect the transient response; however, it does affect turnon time. The smaller the CC value, the

faster the turnon time.

8.2.2.6 Fault Detection

The LP3982 provides a FAULT pin that goes low during out of regulation conditions like current limit and thermal

shutdown, or when it approaches dropout. The latter monitors the input-to-output voltage differential and

compares it against a threshold that is slightly above the dropout voltage. This threshold also tracks the dropout

voltage as it varies with load current. Refer to Figure 3 in the Typical Characteristics section.

The FAULT pin requires a pullup resistor because it is an open-drain output. This resistor must be large in value

to reduce energy drain. A 100-k

Ω pullup resistor works well for most applications.

Figure 18 shows the LP3982 with delay added to the FAULT pin for the reset pin of a microprocessor. The

output of the comparator stays low for a preset amount of time after the regulator comes out of a fault condition.