VCC

Unused Input

Input

Output

Output

Input

Unused Input

IOL (mA)

VOL

(max) V

0

3

6

9

12

15

18

21

24

27

0.1

0.2

0.3

0.4

0.5

VCC

@ 4.75 V

SN74LS292, SN74LS294

SDLS153A – JANUARY 1981 – REVISED JANUARY 2016

www.ti.com

Typical Application (continued)

9.2.3 Application Curve

Figure 11. VOL vs IOL

10 Power Supply Recommendations

The power supply can be any voltage between the minimum and maximum supply voltage rating located in

Recommended Operating Conditions.

Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single

supply, a 0.1-

μF capacitor is recommended and, if there are multiple VCC pins, then a 0.01-μF or 0.022-μF

capacitor is recommended for each power pin. It is acceptable to parallel multiple bypass capacitors to reject

different frequencies of noise. 0.1-

μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor

should be installed as close to the power pin as possible for best results.

11 Layout

11.1 Layout Guidelines

When using multiple bit logic devices, inputs should not ever float. In many cases, functions or parts of functions

of digital logic devices are unused (for example, when only two inputs of a triple-input AND gate are used or only

3 of the 4 buffer gates are used). Such input pins should not be left unconnected because the undefined voltages

at the outside connections result in undefined operational states.

The following are the rules that must be observed under all circumstances:

•

All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from

floating.

•

The logic level that must be applied to any particular unused input depends on the function of the device.

Generally they are tied to GND or VCC, whichever make more sense or is more convenient.

11.2 Layout Example

Figure 12. Generic Layout Best Practices

14

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