LNK562PSLASHGSLASHD datasheet(2/20 Pages) POWERINT

2 / 20 page

LNK562-564

Rev. L 12/21

www.power.com

PI-4547-011107

P Package (DIP-8B)

G Package (SMD-8B)

D Package (SO-8C)

Figure 2. Functional Block Diagram.

Pin Functional Description

DRAIN (D) Pin:

The power MOSFET drain connection provides internal

operating current for both startup and steady-state

operation.

BYPASS (BP) Pin:

A 0.1

mF external bypass capacitor for the internally

generated 5.8 V supply is connected to this pin.

FEEDBACK (FB) Pin:

During normal operation, switching of the power MOSFET

is controlled by this pin. MOSFET switching is disabled

when a current greater than 70

mA flows into this pin.

SOURCE (S) Pin:

This pin is the power MOSFET source connection.

It is also the ground reference for the BYPASS and

FEEDBACK pins.

LinkSwitch-LP Functional Description

LinkSwitch-LP comprises a 700 V power MOSFET

switch with a power supply controller on the same die.

Unlike conventional PWM (pulse width modulation)

controllers, it uses a simple ON/OFF control to regulate

the output voltage. The controller consists of an oscillator,

feedback (sense and logic) circuit, 5.8 V regulator,

BYPASS pin undervoltage circuit, over-temperature

protection, frequency jittering, current limit circuit, and

leading edge blanking.

Figure 3. Pin Configuration.

Oscillator

The typical oscillator frequency is internally set to an

average of 66/83/100 kHz for the LNK562, 563 &

564 respectively. Two signals are generated from the

oscillator: the maximum duty cycle signal (DC

MAX) and

the clock signal that indicates the beginning of each

switching cycle.

The oscillator incorporates circuitry that introduces a

small amount of frequency jitter, typically 5% of the

switching frequency, to minimize EMI. The modulation

rate of the frequency jitter is set to 1 kHz to optimize EMI

PI-3958-092410

CLOCK

JITTER

AUTO-RESTART

COUNTER

FAULT

PRESENT

OSCILLATOR

5.8 V

4.85 V

SOURCE

(S)

DCMAX

ADJ

BYPASS

(BP)

LIMIT

LEADING

EDGE

BLANKING

THERMAL

SHUTDOWN

DRAIN

(D)

BYPASS PIN

UNDERVOLTAGE

CURRENT LIMIT

COMPARATOR

FEEDBACK

(FB)

OPEN LOOP

PULLDOWN

6.3 V

1.69 V -VTH

0.8 V

REGULATOR

5.8 V

RESET

LNK562P/G/D Datasheet(PDF) 2 Page - Power Integrations, Inc.

LNK562P/G/D Datasheet(HTML) 2 Page - Power Integrations, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL