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MAX3222CPWR Datasheet(PDF) 10 Page - Texas Instruments |
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MAX3222CPWR Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 29 page ![]() DIN2 DOUT2 12 8 Powerdown RIN1 16 20 15 PWRDOWN ROUT1 DIN1 DOUT1 13 17 RIN2 9 10 ROUT2 1 EN 10 MAX3222 SLLS408H – JANUARY 2000 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: MAX3222 Submit Documentation Feedback Copyright © 2000–2016, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The MAX3222 consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The device meets the requirements of TIA/EIA- 232-F and provides the electrical interface between an asynchronous communication controller and the serial- port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at data signaling rates up to 250 kbit/s and a maximum of 30-V/μs driver output slew rate. The MAX3222 can be placed in the power-down mode by setting PWRDOWN low, which draws only 1 μA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V − is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting EN high. 8.2 Functional Block Diagram Figure 7. Logic Diagram (Positive Logic) |
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