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MAX3222

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SLLS408H – JANUARY 2000 – REVISED OCTOBER 2016

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Copyright © 2000–2016, Texas Instruments Incorporated

8.3 Feature Description

8.3.1 Power

The power block increases, inverts, and regulates voltage at V+ and V- pins using a charge pump that requires

four external capacitors.

8.3.2 RS232 Driver

Two drivers interface standard logic level to RS232 levels. PWRDOWN input low turns driver off and

PWRDOWN input high turns driver on. Both DIN inputs and PWRDOWN input must be valid high or low. Do not

float logic input pins.

8.3.3 RS232 Receiver

Two receivers interface RS232 levels to standard logic levels. An open input will result in a high output on ROUT.

Each RIN input includes an internal standard RS232 load. EN input low turns on both ROUT pins. EN input high

puts both ROUT pins into high impedance state, output off. EN input must be valid high or low. Do not float logic

input pins.

8.4 Device Functional Modes

Driver and receiver outputs are controlled by the functional truth tables.

(1)

H = high level, L = low level, X = irrelevant, Z = high impedance

Table 1. Functional Table - Each Driver(1)

INPUTS

OUTPUT DOUT

DIN

PWRDOWN

X

L

Z

L

H

H

H

H

L

(1)

H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or

connected driver off

Table 2. Functional Table - Each Receiver(1)

INPUTS

OUTPUT ROUT

RIN

EN

L

L

H

H

L

L

X

H

Z

Open

L

H