Electronic Components Datasheet Search
  English  ▼

X  

TAS5352A Datasheet(PDF) 16 Page - Texas Instruments

Part # TAS5352A
Description  TAS5352A 125-W Stereo Digital Amplifier Power Stage
PDF  35 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS5352A Datasheet(HTML) 16 Page - Texas Instruments

Back Button TAS5352A Datasheet HTML 12Page - Texas Instruments TAS5352A Datasheet HTML 13Page - Texas Instruments TAS5352A Datasheet HTML 14Page - Texas Instruments TAS5352A Datasheet HTML 15Page - Texas Instruments TAS5352A Datasheet HTML 16Page - Texas Instruments TAS5352A Datasheet HTML 17Page - Texas Instruments TAS5352A Datasheet HTML 18Page - Texas Instruments TAS5352A Datasheet HTML 19Page - Texas Instruments TAS5352A Datasheet HTML 20Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 35 page
background image
16
TAS5352A
SLES239A – NOVEMBER 2008 – REVISED DECEMBER 2016
www.ti.com
Product Folder Links: TAS5352A
Submit Documentation Feedback
Copyright © 2008–2016, Texas Instruments Incorporated
Setting the OC threshold too low might cause issues such as lack of enough output power or unexpected
shutdowns due to too-sensitive overload detection.
In general, TI recommends following the external component selection and PCB layout in the Detailed Design
Procedure closely.
For added flexibility, the OC threshold is programmable within a limited range using a single external resistor
connected between the OC_ADJ pin and AGND. See the Electrical Characteristics table for information on the
correlation between programming-resistor value and the OC threshold.
NOTE
A properly functioning overcurrent detector assumes the presence of a properly designed
demodulation filter at the power-stage output. It is required to follow the guidelines in
Table 3 when selecting the OC threshold and an appropriate demodulation inductor.
Table 3. Overcurrent Resistor Selection
OC-ADJUST RESISTOR VALUES (k
Ω)
MAX CURRENT BEFORE OC OCCURS (A), TC = 75°C
22
10.9
33
9.1
47
7.1
The reported maximum peak current in the table above is measured with continuous current in 1
Ω, one channel
active and the other one muted.
7.3.4.3 Pin-to-Pin Short-Circuit Protection (PPSC)
The PPSC detection system protects the device from permanent damage in the case that a power output pin
(OUT_X) is shorted to GND_X or PVDD_X. For comparison the OC protection system detects an over current
after the demodulation filter where PPSC detects shorts directly at the pin before the filter. PPSC detection is
performed at start-up, that is, when VDD is supplied, consequently a short to either GND_X or PVDD_X after
system start-up does not activate the PPSC detection system. When PPSC detection is activated by a short on
the output, all half-bridges are kept in a Hi-Z state until the short is removed, the device then continues the start-
up sequence and starts switching. The detection is controlled globally by a two-step sequence. The first step
ensures that there are no shorts from OUT_X to GND_X, the second step tests that there are no shorts from
OUT_X to PVDD_X. The total duration of this process is roughly proportional to the capacitance of the output LC
filter. The typical duration is < 15 ms/μF. While the PPSC detection is in progress, SD is kept low and the device
does not react to changes applied to the RESET pins. If no shorts are present the PPSC detection passes, and
SD is released. A device reset will not start a new PPSC detection. PPSC detection is enabled in BTL and PBTL
output configurations, the detection is not performed in SE mode. To make sure not to trip the PPSC detection
system, TI recommends not to insert any resistive load to GND_X or PVDD_X.
7.3.4.4 Overtemperature Protection
The TAS5352A has a two-level temperature-protection system that asserts an active-low warning signal (OTW)
when the device junction temperature exceeds 125°C (typical) and, if the device junction temperature exceeds
155°C (typical), the device is put into thermal shutdown, resulting in all half-bridge outputs being set in the high-
impedance (Hi-Z) state and SD being asserted low. OTE is latched in this case. To clear the OTE latch, either
RESET_AB or RESET_CD must be asserted. Thereafter, the device resumes normal operation.
7.3.4.5 Undervoltage Protection (UVP) and Power-On-Reset (POR)
The UVP and POR circuits of the TAS5352A fully protect the device in any power up, power down, or brownout
situations. While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are
fully operational when the GVDD_X and VDD supply voltages reach stated in the Electrical Characteristics.
Although GVDD_X and VDD are independently monitored, a supply voltage drop below the UVP threshold on
any VDD or GVDD_X pin results in all half-bridge outputs immediately being set in the high-impedance (Hi-Z)
state and SD being asserted low. The device automatically resumes operation when all supply voltages have
increased above the UVP threshold.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com