5

TAS5352A

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SLES239A – NOVEMBER 2008 – REVISED DECEMBER 2016

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Copyright © 2008–2016, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

These voltages represent the DC voltage + peak AC waveform measured at the terminal of the device in all conditions.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VDD to AGND

–0.3

13.2

V

GVDD_X to AGND

–0.3

13.2

V

PVDD_X to GND_X (2)

–0.3

53

V

OUT_X to GND_X (2)

–0.3

53

V

BST_X to GND_X (2)

–0.3

66.2

V

BST_X to GVDD_X (2)

–0.3

53

V

VREG to AGND

–0.3

4.2

V

GND_X to GND

–0.3

0.3

V

GND_X to AGND

–0.3

0.3

V

GND to AGND

–0.3

0.3

V

PWM_X, OC_ADJ, M1, M2, M3 to AGND

–0.3

4.2

V

RESET_X, SD, OTW to AGND

–0.3

7

V

Maximum continuous sink current (SD, OTW)

9

mA

Minimum pulse duration, low

30

ns

Lead temperature, 1.6 mm (1/16 inch) from case (10 s)

260

°C

Maximum operating junction temperature, TJ

0

125

°C

Storage temperature, Tstg

–40

125

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2500

V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±750

6.3 Recommended Operating Conditions

MIN

NOM

MAX

UNIT

PVDD_X

Half-bridge supply voltage

0

34.5

37

V

GVDD_X

Supply voltage for logic regulators and gate-drive circuitry

10.8

12

13.2

V

VDD

Digital regulator supply voltage

10.8

12

13.2

V

RL (BTL)

Resistive load impedance (no cycle-by-cycle current control),

recommended demodulation filter

3

4

Ω

RL (SE)

Resistive load impedance (no cycle-by-cycle current control),

recommended demodulation filter

2.25

3

RL (PBTL)

Resistive load impedance (no cycle-by-cycle current control),

recommended demodulation filter

1.5

2

LOutput (BTL)

Output-filter inductance, minimum output inductance under short-circuit condition

5

10

μH

LOutput (SE)

Output-filter inductance, minimum output inductance under short-circuit condition

5

10

LOutput (PBTL)

Output-filter inductance, minimum output inductance under short-circuit condition

5

10

fS

PWM frame rate

192

384

432

kHz

tLOW

Minimum low-state pulse duration per PWM Frame, noise shaper enabled

30

nS

CPVDD

PVDD close decoupling capacitors

0.1

μF