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PCA9570DP Datasheet(PDF) 9 Page - NXP Semiconductors |
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PCA9570DP Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 32 page ![]() PCA9570 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 4 — 17 September 2014 9 of 32 NXP Semiconductors PCA9570 Remote 4-bit general purpose outputs for 1 MHz I2C-bus 8.3 Reading from a port (Input mode) All ports are outputs and cannot be used as inputs. When reading the device, the data returned is the port state at the pin. To read, the master (microcontroller) first addresses the slave device by setting the last bit of the byte containing the slave address to logic 1. The data byte that follows on the SDA is the value of the ports pins. There is no limit to the number of bytes read, and the state of the output port pins is updated at each acknowledge cycle. Logic 1 means that the port is HIGH. Logic 0 means that the port is LOW. When the PCA9570 is read, P7 through P4 return logic ‘1’. 8.4 Power-on reset When power is applied to VDD, an internal Power-On Reset (POR) holds the device in a reset condition until VDD has reached VPOR. At that point, the reset condition is released and the device registers and I2C-bus/SMBus state machine initialize to their default states. See Section 14 for DC and AC characteristics of the POR function. Fig 12. Write mode (output) A5 A4 A3 A2 A1 A0 0 A SA6 slave address START condition R/W acknowledge from slave 002aag833 P6 P5 P7 data 1 A acknowledge from slave 12345678 SCL 9 SDA A acknowledge from slave write to port data output from port tv(Q) P2 data 2 DATA 2 VALID P4 P3 1 P1 P0 P7 P4 P3 0 P1 P0 P6 P2 P5 tv(Q) DATA 1 VALID P2 output voltage Fig 13. Read input port register A5 A4 A3 A2 A1 A0 1 A SA6 slave address START condition R/W acknowledge from slave 002aag846 data from port A acknowledge from master SDA 1 no acknowledge from master read from port data from port DATA 1 DATA 4 P STOP condition |
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