PCA9549 datasheet(6/24 Pages) PHILIPS

6 / 24 page

PCA9549_1

Product data sheet

Rev. 01 — 11 July 2006

6 of 24

Philips Semiconductors

PCA9549

Octal bus switch with individually I2C-bus controlled enables

[1]

Several bits can be enabled at the same time. For example, B7 = 0, B6 = 1, B5 = 0, B4 = 0, B3 = 1, B2 = 1,

B1 = 0, B0 = 0, means that bit 8, bit 6, bit 5, bit 2, and bit 1 are disabled and bit 7, bit 4, and bit 3 are

enabled.

6.3 RESET input

The RESET input is an active LOW signal which may be used to recover from a bus fault

condition. By asserting this signal LOW for a minimum of tw(rst)L, the PCA9549 will reset its

registers and I2C-bus state machine and will open all bits. The RESET input must be

connected to VDD through a pull-up resistor.

6.4 Power-on reset

When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9549 in

a reset state until VDD has reached VPOR. At this point, the reset condition is released and

the PCA9549 registers and I2C-bus state machine are initialized to their default states, all

zeroes causing all the bits to be open (high-impedance state).

6.5 CBT characteristic over VDD range

The bus switch is optimized at 5.0 V but can operate over the entire supply range with

lower Vo(sw) voltage and higher gate resistance.

Table 4.

Control register

Write = channel selection; read = channel status.

Command

XXXXXXX

bit 1 disabled

bit 1 enabled

XXXXXX

bit 2 disabled

bit 2 enabled

XXXXX

bit 3 disabled

bit 3 enabled

XXXX

XXX

bit 4 disabled

bit 4 enabled

XXX

XXXX

bit 5 disabled

bit 5 enabled

XXXXX

bit 6 disabled

bit 6 enabled

XXXXXX

bit 7 disabled

bit 7 enabled

XXXXXXX

bit 8 disabled

bit 8 enabled

PCA9549 Datasheet(PDF) 6 Page - NXP Semiconductors

PCA9549 Datasheet(HTML) 6 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL