CC2570

CC2571

SWRS095A

– FEBRUARY 2011 – REVISED MARCH 2011

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PIN FUNCTIONS (continued)

PIN

DIRECTION

DESCRIPTION

NAME

NO.

DCOUPL

40

DVDD1

39

DVDD2

10

EE_CLK

16

OUT

EEPROM SPI master clock

EE_CS

12

OUT

EEPROM SPI chip select

EE_GND

34

OUT

EEPROM ground

EE_MISO

14

IN

EEPROM SPI master in

EE_MOSI

15

OUT

EEPROM SPI master out

1, 2, 3, 4,

GND

13, 17, 35,

N/A

Ground

37, 38

PORTSEL: Configuration pin to select synchronous or asynchronous serial

PORTSEL

36

IN/IN

communication

R_BIAS

30

RESET

20

I

Reset signal

RF_N

26

RF_P

25

Digital output for serial communication

RTS/SEN

11

OUT/OUT

Synchronous: SEN (Serial-enable flow control)

Asynchronous: RTS (UART flow control)

Digital input for serial communication

RxD/SIN

6

OUT/OUT

Synchronous: SIN (SPI master in)

Asynchronous: RxD (UART receive)

Serial communication pin

SLEEP/MRDY

18

IN/IN

Synchronous: MRDY (message-ready flow control signal)

Asynchronous: SLEEP (sleep assert)

Serial communication pin

SUSPEND/SRDY

19

IN/IN

Synchronous: SRDY (bit- or byte-ready flow control)

Asynchronous: SUSPEND (suspend signal)

Digital output for serial communication

TxD/SOUT

5

OUT/OUT

Synchronous: SOUT (SPI master out)

Asynchronous: TxD (UART transmit)

XOSC32K_Q1

32

XOSC32K_Q2

33

XOSC_Q1

22

XOSC_Q2

23

SERIAL INTERFACE

The CC257x supports various serial interfaces to accommodate almost any application requirements. These

include asynchronous, byte synchronous, and bit synchronous (bit bashing). The serial interface is selected by

using external configuration pins, as described in Table 1. Because these pins are sampled by the CC257x on

startup to determine serial interface, it is important that these pins retain their state while powered up. Changing

the state of these pins after start-up may result in undefined behavior.

Table 1. Serial Interface Selection

Serial Mode

PORTSEL (Pin 36)

SFLOW (Pin 8)

Asynchronous

0

X

Byte synchronous

1

0

Bit synchronous

1

1

12

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