6.3.9 Bus Reset Operation

A Bus Reset Operation is global on the bus and affects only the communication interface of all the devices

connected to it. The Bus Reset operation does not affect either the contents of the device registers, or device

operation, to the extent defined in LM95010 Register Set, see Section 7.

The Bus Reset operation is performed by generating a Reset signal on the bus. The master must apply Reset

after power-up, and before it starts operation. The Reset signal end will be monitored by all the LM95010s on the

bus.

After the Reset Signal Section 6.3.2 requires that the master send a sequence of 8 Data Bits with a value of

"0", without a preceding Start Bit. This is required to enable slaves that "train" their clocks to the bit timing. The

LM95010 does not require nor does it support clock training.

0

0

0

0

0

0

0

0

Reset Signal

= Bit Controlled by Master

= Bit Controlled by Slave

Figure 6-2. Bus Reset Transaction

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SNIS133E – SEPTEMBER 2003 – REVISED FEBRUARY 2024

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