Input

Output

V+

f = 10MHz

V

S = 5V

2/3 (V+)

1/3 (V+)

R

1

1kΩ

R

2

5kΩ

R

2

5kΩ

R

2

5kΩ

V

OUT

V

C

V+

t

C

62pF

1.38R

1C

t

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13

TLV3501, TLV3502

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SBOS321E – MARCH 2005 – REVISED APRIL 2016

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Typical Application (continued)

Figure 18. Relaxation Oscillator

8.2.1.1 Design Requirements

For hysteresis of 1/3 of V+ and threshold levels between 1/3 of V+ and 2/3 of V+, the resistors connected to the

comparator positive input must be equal in value. The resistor value must be kept low enough so it does not

create additional time constant because of the input capacitor and board parasitic capacitor. The value of the

charging resistor, R1, must be relatively low for high-frequency switching without drawing high current and

affecting the output high and low level. The value of the charging capacitor must be high enough to avoid errors

cause by parasitic capacitance.

8.2.1.2 Detailed Design Procedure

For the positive input, +IN = 1/3 VOUT + 1/3 V+ = 1/3 V+ if VOUT is low and assuming VOL is very close to GND.

Or, +IN = 1/3 VOUT + 1/3 V+ = 1/3 V+ = 2/3 V+ if VOUT is high and assuming VOH is very close to V+.

For the negative input, the capacitor charges to 2/3 V+ and discharges to 1/3 V+ exponentially at the same rate

with a time constant of R1C.

8.2.1.3 Application Curve

Figure 19. TLV3501 Device With Upper and Lower Thresholds With 1-V Hysteresis