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MAX5083 Datasheet(PDF) 13 Page - Maxim Integrated Products |
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MAX5083 Datasheet(HTML) 13 Page - Maxim Integrated Products |
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13 / 18 page ![]() 1.5A, 40V, MAXPower Step-Down DC-DC Converters ______________________________________________________________________________________ 13 Pick a value for the feedback resistor R5 in Figure 3 (values between 1k Ω and 10kΩ are adequate). C7 is then calculated as: fC occurs between fZ2 and fP2. The error-amplifier gain (GEA) at fC is due primarily to C6 and R5. Therefore, GEA(fC) = 2 π x fC x C6 x R5 and the modulator gain at fC is: Since GEA(fC) x GMOD(fC) = 1, C6 is calculated by: fP2 is set at one-half the switching frequency (fSW). R6 is then calculated by: Since R3 >> R6, R3 + R6 can be approximated as R3. R3 is then calculated as: fP3 is set at 5xfC. Therefore, C8 is calculated as: Compensation When fC > fZESR For larger ESR capacitors such as tantalum and alu- minum electrolytic ones, fZESR can occur before fC. If fZESR < fC, then fC occurs between fP2 and fP3. fZ1 and fZ2 remain the same as before however, fP2 is now set equal to fZESR. The output capacitor’s ESR zero fre- quency is higher than fLC but lower than the closed- loop crossover frequency. The equations that define the error amplifier’s poles and zeroes (fZ1, fZ2, fP1, fP2, and fP3) are the same as before. However, fP2 is now lower than the closed-loop crossover frequency. Figure 4 shows the error amplifier feedback as well as its gain response for circuits that use higher-ESR output capac- itors (tantalum or aluminum electrolytic). Pick a value for the feedback resistor R5 in Figure 4 (val- ues between 1k Ω and 10kΩ are adequate). C7 is then calculated as: The error amplifier gain between fP2 and fP3 is approxi- mately equal to R5/R6 (given that R6 << R3). R6 can then be calculated as: C6 is then calculated as: C C ESR R 6 6 = × OUT R Rf f LC C 6 510 2 2 ≈ ×× C 1 fLC 7 20 8 5 = ×× × π .R () C C CR f 8 7 27 5 1 = ×× × − π P3 R fC 3 1 26 ≈ ×× π LC . R Cf 6 1 26 0 5 = ×× × π SW C fL C RG C 6 2 5 = ×× × × OUT MOD(DC) π () G G LC fC MOD(fC) MOD(DC) OUT = ×× × 2 22 π C 1 fLC 7 20 8 5 = ×× × π .R GAIN (dB) VOUT REF R3 COMP R6 R5 C6 R4 FREQUENCY CLOSED-LOOP GAIN EA GAIN fZ1 fZ2 fC fP2 fP3 C8 EA C7 Figure 3. Error Amplifier Compensation Circuit (Closed-Loop and Error-Amplifier Gain Plot) for Ceramic Capacitors |
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