INA103 datasheet(9/24 Pages) TI2

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INA103

Accuracy and TCR of the external R

G will also contribute to

gain error and temperature drift. These effects can be di-

rectly inferred from the gain equation.

Connections available on A

1 and A2 allow external resistors

to be substituted for the internal 3k

Ω feedback resistors. A

precision resistor network can be used for very accurate and

stable gains. To preserve the low noise of the INA103, the

value of external feedback resistors should be kept low.

Increasing the feedback resistors to 20k

Ω would increase

noise of the INA103 to approximately 1.5nV/

√Hz. Due to

the current-feedback input circuitry, bandwidth would also

be reduced.

NOISE PERFORMANCE

The INA103 provides very low noise with low source

impedance. Its 1nV/

√Hz voltage noise delivers near theo-

retical noise performance with a source impedance of 200

Ω.

Relatively high input stage current is used to achieve this

low noise. This results in relatively high input bias current

and input current noise. As a result, the INA103 may not

provide best noise performance with source impedances

greater than 10k

Ω. For source impedance greater than 10kΩ,

consider the INA114 (excellent for precise DC applica-

tions), or the INA111 FET-input IA for high speed applica-

tions.

OFFSET ADJUSTMENT

Offset voltage of the INA103 has two components: input

stage offset voltage is produced by A

1 and A2; and, output

stage offset is produced by A

3. Both input and output stage

offset are laser trimmed and may not need adjustment in

many applications.

FIGURE 2. Input Stabilization Network.

FIGURE 3. Offset Adjustment Circuit.

GAIN

GAIN (dB)

RG (Ω)

Note 1

3.16

2774

667

31.6

196

100

60.6(2)

316

1000

NOTES: (1) No RG required for G = 1.

See gain-set connections in Figure 4.

(2) RG for G = 100 is internal. See

gain-set connection in Figure 5.

FIGURE 1. Basic Circuit Configuration.

Offset voltage can be trimmed with the optional circuit

shown in Figure 3. This offset trim circuit primarily adjusts

the output stage offset, but also has a small effect on input

stage offset. For a 1mV adjustment of the output voltage, the

input stage offset is adjusted approximately 1

µV. Use this

adjustment to null the INA103’s offset voltage with zero

differential input voltage. Do not use this adjustment to null

offset produced by a sensor, or offset produced by subse-

quent stages, since this will increase temperature drift.

To offset the output voltage without affecting drift, use the

circuit shown in Figure 4. The voltage applied to pin 7 is

summed at the output. The op amp connected as a buffer

provides a low impedance at pin 7 to assure good common-

mode rejection.

Figure 5 shows a method to trim offset voltage in AC-

coupled applications. A nearly constant and equal input bias

current of approximately 2.5

µA flows into both input termi-

nals. A variable input trim voltage is created by adjusting the

balance of the two input bias return resistances through

which the input bias currents must flow.

VOUT

Ω

1.2µH

INA103

VIN

R L

INA103

O = G • VIN

V–

–

V+

1µF Tantalum

11 10

VIN

INA103

∆

VOUT

10k

Ω

V–

Offset Adjust

Range = ±250mV.

G = 1 + —–

Ω

RTI

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