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LSF0108 Datasheet(PDF) 144 Page - Nexperia B.V. All rights reserved

Part # LSF0108
Description  Discrete and MOSFET components, analog & logic ICs
PDF  234 Pages
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Manufacturer  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved

LSF0108 Datasheet(HTML) 144 Page - Nexperia B.V. All rights reserved

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Schmitt-triggers
Type number
Description
V
CC
(V)
Logic
switching
levels
Output drive
capability
(mA)
t
pd (ns)
Output
Load C
L
(pF)
f
max
(MHz)
Number
of bits
T
amb (°C)
74HCT7541
Octal buffer/line driver Schmitt-trigger;
TTL- enabled (3-state)
4.5 - 5.5
TTL
±6
16
50
36
8
-40 to 125
74HCT9114
9-bit inverter Schmitt-trigger; open drain;
TTL- enabled (3-state)
4.5 - 5.5
TTL
4
13
50
36
9
-40 to 125
74LV132
Quad 2-input NAND gate Schmitt-trigger
1.0 - 5.5
TTL
±12
10
50
30
4
-40 to 125
74LV14
Hex inverter Schmitt-trigger
1.0 - 5.5
TTL
±12
13
50
30
6
-40 to 125
74LV14A
Hex inverter Schmitt-trigger
2.0 - 5.5
CMOS
±12
3.4
15
60
6
-40 to 125
74LV7032A
Quad 2-input OR gate; Schmitt trigger
2.0 - 5.5
CMOS
±12
4.3
15
45
4
-40 to 125
74LVC132A
Quad 2-input NAND gate Schmitt-trigger
1.2 - 3.6
CMOS/LVTTL
±24
3.4
50
175
4
-40 to 125
74LVC14A
Hex inverter Schmitt-trigger
1.2 - 3.6
CMOS/LVTTL
±24
3.2
50
175
6
-40 to 125
74LVC1G14
Single inverter Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
3.0
50
175
1
-40 to 125
74LVC1G17
Single buffer Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
3.0
50
175
1
-40 to 125
74LVC1G57
Configurable gate; Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
6.3
50
150
1
-40 to 125
74LVC1G58
Configurable gate; Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
6.3
50
150
1
-40 to 125
74LVC1G97
Configurable gate; Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
6.3
50
150
1
-40 to 125
74LVC1G98
Configurable gate; Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
6.3
50
150
1
-40 to 125
74LVC1G99
Configurable gate; Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
8.4
50
150
1
-40 to 125
74LVC2G14
Dual inverter Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
3.9
50
175
2
-40 to 125
74LVC2G17
Dual buffer Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
3.6
50
175
2
-40 to 125
74LVC3G14
Triple inverter Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
3.2
50
175
3
-40 to 125
74LVC3G17
Triple buffer Schmitt-trigger
1.65 - 5.5
CMOS/LVTTL
±32
3.6
50
175
3
-40 to 125
74LVT14
Hex inverter Schmitt-trigger
2.7 - 3.6
TTL
±32
3.8
50
150
6
-40 to 125
74VHC14
Hex inverter Schmitt-trigger
2.0 - 5.5
CMOS
±8
3.2
50
60
6
-40 to 125
74VHCT14
Hex inverter Schmitt-trigger; TTL-enabled
4.5 - 5.5
TTL
±8
4.1
50
60
6
-40 to 125
HEF40106B
Hex inverter Schmitt-trigger
3.0 - 15
CMOS
±2.4
30
50
10
6
-40 to 85
HEF4093B
Quad 2-input NAND gate Schmitt-trigger
3.0 - 15
CMOS
±2.4
30
50
10
4
-40 to 125
XC7SET14
Single inverter Schmitt-trigger; TTL-enabled
4.5 - 5.5
TTL
±8
4.1
50
60
1
-40 to 125
XC7SH14
Single inverter Schmitt-trigger
2.0 - 5.5
CMOS
±8
3.2
50
60
1
-40 to 125
XC7WH14
Triple inverter Schmitt-trigger
2.0 - 5.5
CMOS
±8
3.2
50
60
3
-40 to 125
XC7WT14
Triple inverter Schmitt-trigger; TTL-enabled
4.5 - 5.5
TTL
±8
4.1
50
60
3
-40 to 125
Asynchronous interface analog & logic ICs
Types in
bold represent new products
Nexperia selection guide 2020
144



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