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LSF0108 Datasheet(PDF) 163 Page - Nexperia B.V. All rights reserved |
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LSF0108 Datasheet(HTML) 163 Page - Nexperia B.V. All rights reserved |
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163 / 234 page ![]() Control analog & logic ICs NAND Gates Type number Description V CC (V) Logic switching levels Output drive capability (mA) t pd (ns) Output Load C L (typ) (pF) f max (MHz) Number of bits T amb (°C) 74AHCT1G00 Single 2-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±8 3.6 50 60 1 -40 to 125 74AHCT2G00 Dual 2-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±8 3.6 50 60 2 -40 to 125 74AUP1T00 Single supply 2-input voltage-translating NAND gate 2.3 - 3.6 CMOS ±1.9 3.7 15 70 1 -40 to 125 74AUP2G132 Dual 2-input NAND gate Schmitt-trigger 1.1 - 3.6 CMOS ±1.9 10 30 70 2 -40 to 125 74AXP1G00 Single 2-input NAND gate 0.7 - 2.75 CMOS ±4.5 2.7 5 70 1 -40 to 85 74AXP1G10 Single 3-input NAND gate 0.7 - 2.75 CMOS ±4.5 2.6 5 70 1 -40 to 85 74HC132 Quad 2-input NAND gate Schmitt-trigger 2.0 - 6.0 CMOS ±5.2 11 50 36 4 -40 to 125 74HCT132 Quad 2-input NAND gate Schmitt-trigger; TTL-enabled 4.5 - 5.5 TTL ±4 17 50 36 4 -40 to 125 74LV00A Quad 2-input NAND gate 2.0 - 5.5 CMOS ± 12 4.3 15 45 4 -40 to 125 74LV132 Quad 2-input NAND gate Schmitt-trigger 1.0 - 5.5 TTL ±12 10 50 30 4 -40 to 125 74LVC132A Quad 2-input NAND gate Schmitt-trigger 1.2 - 3.6 CMOS/ LVTTL ±24 3.4 50 175 4 -40 to 125 HEF4093B Quad 2-input NAND gate Schmitt-trigger 3.0 - 15 CMOS ±2.4 3.0 50 10 4 -40 to 85 74AHC30 8-input NAND gate 2.0 - 5.5 CMOS ±8 3.6 50 60 1 -40 to 125 74AHCT30 8-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±8 3.3 50 60 1 -40 to 125 74ALVC00 Quad 2-input NAND gate 1.65 - 3.6 CMOS/ LVTTL ±24 2.1 50 145 4 -40 to 85 74AUP1G00 Single 2-input NAND gate 1.1 - 3.6 CMOS ±1.9 8.3 30 70 1 -40 to 125 74AUP1G132 Single 2-input NAND gate Schmitt trigger 1.1 - 3.6 CMOS ±1.9 10 30 70 1 -40 to 125 74AUP1G38 Single 2-input NAND gate; open drain 1.1 - 3.6 CMOS 1.9 8.5 30 70 1 -40 to 125 74AUP2G00 Dual 2-input NAND gate 1.1 - 3.6 CMOS ±1.9 8.3 30 70 2 -40 to 125 74AUP2G38 Dual 2-input NAND gate; open drain 1.1 - 3.6 CMOS 1.9 8.5 30 70 2 -40 to 125 74HC00 Quad 2-input NAND gate 2.0 - 6.0 CMOS ±5.2 7.0 50 36 4 -40 to 125 74HC03 Quad 2-input NAND gate; open drain 2.0 - 6.0 CMOS 5.2 8.0 50 36 4 -40 to 125 74HC10 Triple 3-input NAND gate 2.0 - 6.0 CMOS ±5.2 9.0 50 36 3 -40 to 125 74HC1G00 Single 2-input NAND gate 2.0 - 6.0 CMOS ±2.6 7.0 50 36 1 -40 to 125 74HC20 Dual 4-input NAND gate 2.0 - 6.0 CMOS ±5.2 8.0 50 36 2 -40 to 125 74HC2G00 Dual 2-input NAND gate 2.0 - 6.0 CMOS ±5.6 9.0 50 36 2 -40 to 125 74HC30 8-input NAND gate 2.0 - 6.0 CMOS ±5.2 12 50 36 1 -40 to 125 74HCT00 Quad 2-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±4 10 50 36 4 -40 to 125 74HCT03 Quad 2-input NAND gate; TTL-enabled; open drain 4.5 - 5.5 TTL ±4 10 50 36 4 -40 to 125 74HCT10 Triple 3-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±4 11 50 36 3 -40 to 125 74HCT1G00 Single 2-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±2 10 50 36 1 -40 to 125 74HCT20 Dual 4-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±4 13 50 36 2 -40 to 125 74HCT2G00 Dual 2-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±4 12 50 36 2 -40 to 125 74HCT30 8-input NAND gate; TTL-enabled 4.5 - 5.5 TTL ±4 12 50 36 1 -40 to 125 74LV00 Quad 2-input NAND gate 1.0 - 5.5 TTL ±12 7 50 30 4 -40 to 125 74LV03 Quad 2-input NAND gate; TTL-enabled; open drain 1.0 - 5.5 TTL ±12 8.0 50 30 4 -40 to 125 74LV1T00 Single supply 2-input translating NAND gate 1.6 - 5.5 CMOS ±8 3.1 15 60 1 -40 to 125 74LVC00A Quad 2-input NAND gate 1.2 - 3.6 CMOS/ LVTTL ±24 2.1 50 150 4 -40 to 125 74LVC10A Triple 3-input NAND gate 1.2 - 3.6 CMOS/ LVTTL ±24 3.9 50 150 3 -40 to 125 74LVC1G00 Single 2-input NAND gate 1.65 - 5.5 CMOS/ LVTTL ±32 2.2 50 175 1 -40 to 125 74LVC1G10 Single 3-input NAND gate 1.65 - 5.5 CMOS/ LVTTL ±32 2.6 50 175 1 -40 to 125 74LVC1G38 Single 2-input NAND gate; open drain 1.65 - 5.5 CMOS/ LVTTL 32 2.3 50 175 1 -40 to 125 74LVC2G00 Dual 2-input NAND gate 1.65 - 5.5 CMOS/ LVTTL ±32 2.2 50 175 2 -40 to 125 74LVC2G38 Dual 2-input NAND gate; open drain 1.65 - 5.5 CMOS/ LVTTL 32 2.1 50 175 2 -40 to 125 74LVC30A 8-input NAND gate 1.65 - 5.5 CMOS/ LVTTL 24 3.6 50 175 1 -40 to 125 HEF4011B Quad 2-input NAND gate 3.0 - 15 CMOS ±2.4 20 50 10 4 -40 to 85 Types in bold represent new products 163 |
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