ADS8568 datasheet(32/62 Pages) TI2

32 / 62 page

3dB

ln(2)

2 t

CONV

ADS8528, ADS8548, ADS8568

SBAS543C – AUGUST 2011 – REVISED FEBRUARY 2016

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Product Folder Links: ADS8528 ADS8548 ADS8568

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Feature Description (continued)

Table 1 lists some examples of internal reference DAC settings with a reference range set to 2.5 V. However, to

ensure proper performance, the DAC output voltage must not be programmed below 0.5 V.

Decouple the buffered output of the DAC with a 100-nF capacitor (minimum); for best performance, a 470-nF

capacitor is recommended. If the internal reference is placed into power-down (default), an external reference

voltage can drive the REFIO pin.

Table 1. DAC Settings Examples (2.5-V Operation)

VREFOUT

DECIMAL CODE

BINARY CODE

HEXADECIMAL CODE

0.5 V

204

00 1100 1100

CCh

1.25 V

511

01 1111 1111

1FFh

2.5 V

1023

11 1111 1111

3FFh

The voltage at the REFIO pin is buffered with four internal amplifiers, one for each ADC pair. The output of each

buffer must be decoupled with a 10-µF capacitor between the pin pairs of 3 and 6, 43 and 46, 50 and 53, and 60

and 63. The 10-µF capacitors are available as ceramic 0805-SMD components and in X5R quality.

The internal reference buffers can be powered down to decrease the power dissipation of the device. In this

case, external reference drivers can be connected to the REFAP, REFBP, REFCP, and REFDP pins. With 10-µF

decoupling capacitors, the minimum required bandwidth can be calculated using Equation 4:

(4)

With the minimum tCONV of 1.33 µs, the external reference buffers require a minimum bandwidth of 83 kHz.

9.3.2 Digital

This section describes the digital control and the timing of the device in detail.

9.3.2.1 Device Configuration

Depending on the desired mode of operation, the ADS85x8 can be configured using the external pins or the

Configuration register (CONFIG), as shown in Table 2.

Table 2. ADS85x8 Configuration Settings

INTERFACE MODE

HARDWARE MODE (HW/SW = 0)

SOFTWARE MODE (HW/SW = 1)

Parallel (PAR/SER = 0)

Configuration using pins and (optionally) Configuration

C13, and C[9:0]

Configuration using Configuration register bits C[31:0]

only; status of pins 9, 11, 20, and 34 are disregarded

(if C29 = C28 = 0)

Serial (PAR/SER = 1)

Configuration using pins and (optionally) Configuration

and C[9:0]

Configuration using Configuration register bits C[31:0]

only; status of pins 9, 11, 20, and 34 are disregarded

(if C29 = C28 = 0)

ADS8568 Datasheet(PDF) 32 Page - Texas Instruments

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