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KB3511 Datasheet(PDF) 12 Page - Kingbor Technology Co |
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KB3511 Datasheet(HTML) 12 Page - Kingbor Technology Co |
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12 / 14 page ![]() 12 KB3511 Kingbor Technology Co.,Ltd TEL:(86)0755-26508846 FAX:(86)0755-26509052 APPLICATIONS INFORMATION Figure 3. kB3511 Layout Diagram (See Board Layout Checklist) RUN2 VIN VIN VOUT1 VOUT2 RUN1 POR SW2 VFB2 GND VFB1 SW1 MODE/SYNC KB3511ADJ CIN C4 C5 L1 L2 R4 R2 R1 R3 COUT2 COUT1 BOLD LINES INDICATE HIGH CURRENT PATHS regulator operating in a 70 °C ambient temperature is approximately: TJ = 2 • 0.272 • 45 + 70 = 95°C which is below the absolute maximum junction tempera- ture of 125 °C. Design Example As a design example, consider using the KB3511 in an portable application with a Li-Ion battery. The battery provides a VIN = 3.6V to 4.2V. The load requires a maxi- mum of 600mA in active mode and 2mA in standby mode. The output voltage is VOUT = 3.3V. Since the load still needs power in standby, Trickle Mode operation is selected for good low load efficiency. First, calculate the inductor value for about 30% ripple current at maximum VIN: The closest standard value is 10 µF. Since the output impedance of a Li-Ion battery is very low, CIN is typically 10 µF. The output voltage can now be programmed by choosing the values of R1 and R2. To maintain high efficiency, the current in these resistors should be kept small. Choosing 2 µA with the 0.6V feedback voltage makes R1~300k. A close standard 1% resistor is 280k, and R2 is then 887k. The PGOOD pin is a common drain output and requires a pull-up resistor. A 100k resistor is used for adequate speed. Figure 1 shows the complete schematic for this design example. Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the KB3511. These items are also illustrated graphically in the layout diagram of Figure 3. Check the following in your layout: 1. Does the capacitor CIN connect to the power VIN (Pin 3) and GND (exposed pad) as close as possible? This capaci- tor provides the AC current to the internal power MOSFETs and their drivers. 2. Are the COUT and L1 closely connected? The (–) plate of COUT returns current to GND and the (–) plate of CIN. 3. The resistor divider, R1 and R2, must be connected between the (+) plate of COUT and a ground sense line terminated near GND (exposed pad). The feedback signals VFB should be routed away from noisy components and traces, such as the SW line (Pins 4 and 7), and its trace should be minimized. 4. Keep sensitive components away from the SW pins. The input capacitor CIN and the resistors R1 to R4 should be routed away from the SW traces and the inductors. 5. A ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the GND pin at one point and should not share the high current path of CIN or COUT. 6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be con- nected to VIN or GND. L V MHz mA V V H = ⎝⎜ ⎠⎟ =µ 33 2 2 300 1 33 42 107 . . . . . Choosing the closest inductor from a vendor of 1.0 µH inductor, results in a maximum ripple current of: ∆= µ − ⎛ ⎝⎜ ⎞ ⎠⎟ = I V MHz V V mA L 33 22 10 1 33 42 330 . .. . . For cost reasons, a ceramic capacitor will be used. COUT selection is then based on load step droop instead of ESR requirements. For a 5% output droop: C mA MHz V F OUT ≈= µ 3 600 22 5 3 3 49 .( % . ) . − |
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