CC1352R datasheet(8/61 Pages) TI2

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Table 7-1. Signal Descriptions – RGZ Package (continued)

I/O

TYPE

DESCRIPTION

NAME

NO.

VDDR_RF

—

Power

Internal supply, must be powered from the internal DC/DC

converter or the internal LDO(2) (5) (6)

VDDS

—

Power

1.8 V to 3.8 V main chip supply(1)

VDDS2

—

Power

1.8 V to 3.8 V DIO supply(1)

VDDS3

—

Power

1.8 V to 3.8 V DIO supply(1)

VDDS_DCDC

—

Power

1.8 V to 3.8 V DC/DC converter supply

X48M_N

—

Analog

48 MHz crystal oscillator pin 1

X48M_P

—

Analog

48 MHz crystal oscillator pin 2

X32K_Q1

—

Analog

32 kHz crystal oscillator pin 1

X32K_Q2

—

Analog

32 kHz crystal oscillator pin 2

(1)

For more details, see technical reference manual listed in Section 11.2.

(2)

Do not supply external circuitry from this pin.

(3)

EGP is the only ground connection for the device. Good electrical connection to device ground on printed circuit board (PCB) is

imperative for proper device operation.

(4)

If internal DC/DC converter is not used, this pin is supplied internally from the main LDO.

(5)

If internal DC/DC converter is not used, this pin must be connected to VDDR for supply from the main LDO.

(6)

Output from internal DC/DC and LDO is trimmed to 1.68 V.

7.3 Connections for Unused Pins and Modules

Table 7-2. Connections for Unused Pins – RGZ Package

FUNCTION

SIGNAL NAME

PIN NUMBER

ACCEPTABLE PRACTICE(1)

PREFERRED

PRACTICE(1)

GPIO

DIO_n

5–12

14–21

26–32

36–43

NC or GND

32.768 kHz crystal

X32K_Q1

NC or GND

X32K_Q2

DC/DC converter(2)

DCDC_SW

VDDS_DCDC

VDDS

(1)

NC = No connect

(2)

When the DC/DC converter is not used, the inductor between DCDC_SW and VDDR can be removed. VDDR and VDDR_RF must still

be connected and the 22 µF DCDC capacitor must be kept on the VDDR net.

CC2652R

SWRS207J – JANUARY 2018 – REVISED NOVEMBER 2023

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