DAC80508Z datasheet(20/59 Pages) TI2

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OUT0

DAC

Buffer

Channel 0

Channel 1

Channel 2

Power Down Logic

Resistive Network

Power On Reset

DACx0508

OUT1

OUT2

REF

SCLK

SDI

SDO/ALARM or CLR

VDD

DAC

INTERNAL

REFERENCE

VIO

GAIN

x1 OR x2

GND

BUF

Channel 3

OUT3

Channel 4

OUT4

Channel 5

OUT5

Channel 6

OUT6

Channel 7

OUT7

+1 OR +2

SDO/ALARM (DACx0508), CLR (DACx0508C)

DAC80508, DAC70508, DAC60508

SLASEL1D – JUNE 2017 – REVISED AUGUST 2018

www.ti.com

Product Folder Links: DAC80508 DAC70508 DAC60508

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8 Detailed Description

8.1 Overview

The DACx0508 is a pin-compatible family of low-power, eight-channel, buffered voltage-output digital-to-analog

converters (DACs) with 16-, 14- and 12-bit resolution. The DACx0508 includes a 2.5 V internal reference and

user selectable gain configuration providing full scale output voltages of 1.25 V (gain = ½), 2.5 V (gain = 1) or 5 V

(gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is specified monotonic, and provides high

linearity of ±1 LSB INL.

Communication to the DACx0508 is performed through a serial interface that supports stand-alone and daisy-

chain operation. The optional frame-error checking provides added robustness to the DACx0508 serial interface.

The DACx0508 incorporates a power-on-reset circuit that powers up and maintains the DAC outputs at either

zero scale or midscale until a valid code is written to the device.

A dedicated clear pin (DACx0508C) enables a simultaneous update of multiple DAC channels to their power-on-

reset value.

8.2 Functional Block Diagram

DAC80508Z Datasheet(PDF) 20 Page - Texas Instruments

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