LPC2387 datasheet(27/47 Pages) NXP

27 / 47 page

LPC2387_2

Product data sheet

Rev. 02 — 1 February 2008

27 of 47

NXP Semiconductors

LPC2387

Fast communication chip

Upon power-up or any chip reset, the LPC2387 uses the IRC as the clock source.

Software may later switch to one of the other available clock sources.

7.24.1.2

Main oscillator

The main oscillator can be used as the clock source for the CPU, with or without using the

PLL. The main oscillator operates at frequencies of 1 MHz to 24 MHz. This frequency can

be boosted to a higher frequency, up to the maximum CPU operating frequency, by the

PLL. The clock selected as the PLL input is PLLCLKIN. The ARM processor clock

frequency is referred to as CCLK elsewhere in this document. The frequencies of

PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The

clock frequency for each peripheral can be selected individually and is referred to as

PCLK. Refer to Section 7.24.2 for additional information.

7.24.1.3

RTC oscillator

The RTC oscillator can be used as the clock source for the RTC and/or the WDT. Also, the

RTC oscillator can be used to drive the PLL and the CPU.

7.24.2 PLL

The PLL accepts an input clock frequency in the range of 32 kHz to 50 MHz. The input

frequency is multiplied up to a high frequency, then divided down to provide the actual

clock used by the CPU and the USB block.

The PLL input, in the range of 32 kHz to 50 MHz, may initially be divided down by a value

‘N’, which may be in the range of 1 to 256. This input division provides a wide range of

output frequencies from the same input frequency.

Following the PLL input divider is the PLL multiplier. This can multiply the input divider

output through the use of a Current Controlled Oscillator (CCO) by a value ‘M’, in the

range of 1 through 32768. The resulting frequency must be in the range of 275 MHz to

550 MHz. The multiplier works by dividing the CCO output by the value of M, then using a

phase-frequency detector to compare the divided CCO output to the multiplier input. The

error value is used to adjust the CCO frequency.

The PLL is turned off and bypassed following a chip Reset and by entering Power-down

mode. PLL is enabled by software only. The program must conﬁgure and activate the PLL,

wait for the PLL to Lock, then connect to the PLL as a clock source.

7.24.3 Wake-up timer

The LPC2387 begins operation at power-up and when awakened from Power-down mode

by using the 4 MHz IRC oscillator as the clock source. This allows chip operation to

resume quickly. If the main oscillator or the PLL is needed by the application, software will

need to enable these features and wait for them to stabilize before they are used as a

clock source.

When the main oscillator is initially activated, the wake-up timer allows software to ensure

that the main oscillator is fully functional before the processor uses it as a clock source

and starts to execute instructions. This is important at power on, all types of Reset, and

whenever any of the aforementioned functions are turned off for any reason. Since the

oscillator and other functions are turned off during Power-down mode, any wake-up of the

processor from Power-down mode makes use of the wake-up Timer.

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