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LP38690, LP38692

SNVS322M – DECEMBER 2004 – REVISED DECEMBER 2015

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Copyright © 2004–2015, Texas Instruments Incorporated

Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more costly

when comparing equivalent capacitance and voltage ratings in the 0.47-

μF to 4.7-μF range. Another important

consideration is that tantalum capacitors have higher ESR values than equivalent size ceramic capacitors. This

means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it

would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the

same ESR value. It should also be noted that the ESR of a typical tantalum increases about 2:1 as the

temperature goes from 25°C down to -40°C, so some guard band must be allowed.

8.2.3 Application Curves

Figure 33. VOUT vs VEN, On (LP38692 Only)

Figure 34. VOUT vs VEN, Off (LP38692 Only)

9 Power Supply Recommendations

The LP38690 and LP38692 are designed to operate from an input supply voltage range of 2.7 V to 10 V. The

input supply must be well regulated and free of spurious noise. To ensure that the LP38690 or LP38692 output

voltage is well regulated, the input supply must be at least VOUT + 0.5 V, or 2.7 V, whichever is higher. A

minimum capacitor value of 1-

μF is required to be within 1 cm of the IN pin.

10 Layout

10.1 PCB Layout

The dynamic performance of the LP38690 and LP38692 devices is dependent on the layout of the PCB. PCB

layout practices that are adequate for typical LDOs may degrade the load regulation, PSRR, noise, or transient

performance of the LP38690 or LP38692.

Best performance is achieved by placing CIN and COUT on the same side of the PCB as the LP38690 or

LP38692, and as close to the package as is practical. The ground connections for CIN and COUT must be back to

the LP38690 or LP38692 GND pin using as wide and short a copper trace as is practical.

Connections using long trace lengths, narrow trace widths, or connections through vias must be avoided. These

add parasitic inductances and resistance that result in inferior performance especially during transient conditions.

A ground plane, either on the opposite side of a two-layer PCB, or embedded in a multi-layer PCB, is strongly

recommended. This ground plane serves two purposes:

1. Provides a circuit reference plane to assure accuracy, and

2. provides a thermal plane to remove heat from the LP38690 or LP38692 WSON package through thermal

vias under the package DAP.