PCM5100APWR datasheet(5/44 Pages) TI2

5 / 44 page

PCM5100A, PCM5101A, PCM5102A

PCM5100A-Q1, PCM5101A-Q1, PCM5102A-Q1

www.ti.com

SLAS859C – MAY 2012 – REVISED MAY 2015

7 Pin Configuration and Functions

PW 20-Pin Package

(Top View)

Pin Functions

TYPE

DESCRIPTION

NAME

NO.

AGND

—

Analog ground

AVDD

Analog power supply, 3.3 V

BCK

Audio data bit clock input(1)

CAPM

Charge pump flying capacitor terminal for negative rail

CAPP

Charge pump flying capacitor terminal for positive rail

CPGND

—

Charge pump ground

CPVDD

Charge pump power supply, 3.3 V

DEMP

De-emphasis control for 44.1-kHz sampling rate(1): Off (Low) / On (High)

DGND

—

Digital ground

DIN

Audio data input(1)

DVDD

Digital power supply, 1.8 V or 3.3 V

FLT

Filter select : Normal latency (Low) / Low latency (High)

FMT

Audio format selection : I2S (Low) / Left-justified (High)

LDOO

Internal logic supply rail terminal for decoupling, or external 1.8 V supply terminal

LRCK

Audio data word clock input(1)

OUTL

Analog output from DAC left channel

OUTR

Analog output from DAC right channel

SCK

System clock input(1)

VNEG

Negative charge pump rail terminal for decoupling, –3.3 V

XSMT

Soft mute control(1): Soft mute (Low) / soft un-mute (High)

(1)

Failsafe LVCMOS Schmitt trigger input

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Product Folder Links: PCM5100A PCM5101A PCM5102A PCM5100A-Q1 PCM5101A-Q1 PCM5102A-Q1

PCM5100APWR Datasheet(PDF) 5 Page - Texas Instruments

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