TCA9554 datasheet(21/48 Pages) TI2

21 / 48 page

Device (Slave) Address (7 bits)

Data Byte to Register 0x02 (8 bits)

START

R/W=0

ACK

STOP

Master controls SDA line

Slave controls SDA line

Device (Slave) Address (7 bits)

Data Byte to Register N (8 bits)

START

R/W=0

ACK

STOP

Write to one register in a device

Master controls SDA line

Slave controls SDA line

TCA9554

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SCPS233E – MARCH 2012 – REVISED FEBRUARY 2017

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8.6.3.1 Bus Transactions

Data is exchanged between the master and the TCA9554 through write and read commands.

8.6.3.1.1

Writes

To write on the I2C bus, the master sends a START condition on the bus with the address of the slave, as well

as the last bit (the R/W bit) set to 0, which signifies a write. After the slave sends the acknowledge bit, the master

then sends the register address of the register to which it wishes to write. The slave acknowledges again, letting

the master know it is ready. After this, the master starts sending the register data to the slave until the master

has sent all the data necessary (which is sometimes only a single byte), and the master terminates the

transmission with a STOP condition. Note that the command byte/register address does NOT automatically

increment. Writing multiple bytes during a write results in the last byte sent being stored in the register.

See the Register Descriptions section to see list of the TCA9554's internal registers and a description of each

TCA9554 Datasheet(PDF) 21 Page - Texas Instruments