7.5 Electrical Characteristics

over recommended operating junction temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

VOL

Low-level output voltage

VDD = 2 V to 6 V, IOL = 500 µA

0.3

V

VDD = 3.3 V, IOL = 2 mA

0.4

VDD = 6 V, IOL = 4 mA

0.4

Power-up reset voltage(1)

IOL = 50 µA, VOL < 0.2 V

1.1

V

VIT–

Negative-going input

threshold voltage(2)

TLV803Z

TJ = – 40°C to +125°C

2.20

2.25

2.30

V

TLV803R

2.58

2.64

2.70

TLV803S

2.87

2.93

2.99

TLV8x3M

4.28

4.38

4.48

Vhys

Hysteresis

TLV803Z

TJ = 25°C, IOL = 50 µA

30

mV

TLV803R

35

TLV803S

40

TLV8x3M

60

IDD

Supply current

VDD = 2 V, output unconnected

9

15

µA

VDD = 6 V, output unconnected

20

30

IOH

Output leakage current

VDD = 6 V

350

nA

(1)

The lowest supply voltage at which RESET becomes valid. tr,VDD ≤ 66.7 V/ms.

(2)

To ensure best stability of the threshold voltage, place a bypass capacitor (0.1-µF ceramic) near the supply terminals.

7.6 Switching Characteristics

over operating temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tw

Pulse duration at VDD

VDD = 1.08 VIT– to 0.92 VIT–

10

µs

td

Delay time

VDD ≥ VIT– + 0.2 V; see Timing Diagram

120

200

280

ms

t

d

t

d

t

1

0

t

RESET

ForV

<1.1VUndefined

BehaviorofOutput

DD

RESET

1.1V

V

DD

V

IT-

Figure 7-1. Timing Diagram

TLV803, TLV853, TLV863

SBVS157E – APRIL 2011 – REVISED DECEMBER 2020

www.ti.com

6

Submit Document Feedback

Copyright © 2020 Texas Instruments Incorporated

Product Folder Links: TLV803 TLV853 TLV863