Electronic Components Datasheet Search
  English  ▼

X  

TPD2E009 Datasheet(PDF) 4 Page - Texas Instruments

Part # TPD2E009
Description  TPD2E009 2-Channel ESD Solution for High-Speed (6-Gbps) Differential Interface
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TPD2E009 Datasheet(HTML) 4 Page - Texas Instruments

  TPD2E009 Datasheet HTML 1Page - Texas Instruments TPD2E009 Datasheet HTML 2Page - Texas Instruments TPD2E009 Datasheet HTML 3Page - Texas Instruments TPD2E009 Datasheet HTML 4Page - Texas Instruments TPD2E009 Datasheet HTML 5Page - Texas Instruments TPD2E009 Datasheet HTML 6Page - Texas Instruments TPD2E009 Datasheet HTML 7Page - Texas Instruments TPD2E009 Datasheet HTML 8Page - Texas Instruments TPD2E009 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 21 page
background image
TPD2E009
SLVS953B – JUNE 2009 – REVISED AUGUST 2015
www.ti.com
6.4 Thermal Information
TPD2E009
THERMAL METRIC(1)
DBZ (SOT)
DRT (SOT)
UNIT
3 PINS
3 PINS
RθJA
Junction-to-ambient thermal resistance
461.8
610
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
216.2
288
°C/W
RθJB
Junction-to-board thermal resistance
195.6
118.4
°C/W
ψJT
Junction-to-top characterization parameter
70.1
20.2
°C/W
ψJB
Junction-to-board characterization parameter
193.7
116.4
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VRWM
Reverse stand-off voltage
D+, D– pins to ground
5.5
V
VCLAMP
Clamp voltage
D+, D– pins to ground,
IIO = 1 A
8
V
IIO
Current from I/O port to supply pins
VIO = 2.5 V
0.01
0.1
μA
D+, D– pins,
VIO = 2.5 V, ID = 8 mA
0.6
0.8
0.95
lower clamp diode,
VD
Diode forward voltage
V
D+, D– pins,
upper clamp diode,
VCC = 0 V, ID = –8 mA
0.6
0.8
0.95
DRY package
RDYN
Dynamic resistance
D+, D– pins,
I = 1 A
1
Ω
D+, D– pins, DBZ
VIO = 2.5 V, f = 10 MHz
0.9
pF
Package
CIO
I/O capacitance
D+, D– pins, DRT
VIO = 2.5 V, f = 10 MHz
0.7
pF
Package
VBR
Break-down voltage
IIO = 1 mA
7
V
4
Submit Documentation Feedback
Copyright © 2009–2015, Texas Instruments Incorporated
Product Folder Links: TPD2E009



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com