LD7523GS datasheet(11/18 Pages) LEADTREND

11 / 18 page

LD7523

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7523-DS-00

June 2009

MOSFET directly.

And the maximum duty-cycle of

LD7523 is limited to 75% to avoid the transformer

saturation.

Oscillator and Switching Frequency

The switching frequency of LD7523 is fixed as 65KHz

internally

provide

the

optimized

operations

considering the EMI performance, thermal treatment,

component sizes and transformer design.

Voltage Feedback Loop

The voltage feedback signal is provided from the TL431 in

the secondary side through the photo-coupler to the

COMP pin of LD7523.

The input stage of LD7523, like

the UC384X, has 2 diodes voltage offset before feeding

into the voltage divider with 1/3 ratio, that is,

)

(

)

COMP

PWM

(

COMPARATOR

−

A pulling-high resistor is embedded internally to eliminate

the requirement of another resistor in the external circuit.

Dual-Oscillator Green-Mode Operation

There are many different topologies implemented in

different chips for the green-mode or power saving

requirements,

such

“burst-mode

control”,

“skipping-cycle mode”, “variable off-time control “…etc.

The basic operation theory of all these approaches

intends to reduce the switching cycles under light-load or

no-load condition either by skipping some switching

pulses or reduce the switching frequency.

By using this dual-oscillator control, the green-mode

frequency can be well controlled and further to avoid the

generation of audible noise.

Internal Slope Compensation

A fundamental issue of current mode control is the

stability problem when its duty-cycle is over 50%. To

stabilize the control loop, slope compensation is required

in the traditional UC384X design by injecting the ramp

signal from the RT/CT pin through a coupling capacitor. In

the LD7523, the internal slope compensation circuit has

been internally implemented to simplify the external circuit

design.

Current Sensing, Leading-Edge Blanking

The typical current mode PWM controller feedbacks both

current signal and voltage signal to close the control loop

and achieve regulation. The LD7523 detects the primary

MOSFET current from the CS pin, which is not only for the

peak current mode control but also for the pulse-by-pulse

current limit. The maximum voltage threshold of the

current sensing pin is set as 0.85V. Thus the MOSFET

peak current can be calculated as:

COMPENSATI

LINE

)

MAX

(

PEAK

)

(

−

A 350nS leading-edge blanking (LEB) time is included in

the input of CS pin to prevent the false-trigger from the

current spike. However, the total pulse width of the

turn-on spike is decided by the output power, circuit

design and PCB layout.

It is strongly recommended to

adopt a smaller R-C filter (as shown in figure 21) to avoid

the CS pin being damaged by the negative turn-on spike.

Fig. 21

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