Watchdog Timer

Logic

WDO

Logic

Oscillator

VDD

WD_EN

SET0

WDI

GND

WDO

Figure 7-4. Pinout Option J

Capacitance

Detection

Watchdog Timer

Logic

WDO

Logic

Oscillator

VDD

CRST

CWD

WDI

GND

WDO

Figure 7-5. Pinout Option K

7.3 Feature Description

7.3.1 Timeout Watchdog Timer

The TPS3435 offers high precision timeout watchdog timer monitoring. The device is available in multiple pinout

options A to K which support multiple features to meet ever expanding needs of various applications. Make sure

a correct pinout is selected to meet the application needs.

The timeout watchdog is active when the VDD voltage is higher than the VDDMIN, MR voltage is held higher

than 0.7 x VDD and watchdog is enabled. TPS3435 family offers various startup time delay options to make

sure enough time is available for the host to complete boot operation. Please refer Section 7.3.1.3 for additional

details.

The timeout watchdog timer monitors the WDI pin for falling edge in the time frame defined by tWD time period.

Refer Section 7.3.1.1 section to arrive at the relevant tWD value needed for application. The timer value is reset

when a valid falling edge is detected on WDI pin in the tWD time duration. When a valid WDI transition is not

detected in tWD time, the device asserts WDO output. The WDO is asserted for time tWDO . Refer Section 7.3.3

to arrive at the relevant tWDO value needed for application.

Figure 7-6 shows the basic operation for timeout watchdog timer operation. The TPS3435 watchdog functionality

supports multiple features. Details are available in following sub sections.

TPS3435

SNVSCF7A – DECEMBER 2022 – REVISED AUGUST 2024

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