6.7 Timing Requirements

At 1.04V ≤ VDD ≤ 6V, MR = Open, WDO pull-up resistor (Rpull-up) = 100kΩ to VDD, output RESET / WDO load (CLOAD) =

10pF and over operating free-air temperature range –40

℃ to 125℃, unless otherwise noted. VDD ramp rate ≤ 1V/µs. Typical

values are at TA = 25℃

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

t MR_PW

MR pin pulse duration to assert output

100

ns

tP-WD

WDI pulse duration to start next frame (1)

500

ns

tHD-WDEN

WD–EN hold time to enable or disable WD

operation (1)

200

µs

tHD-SETx

SETx hold time to change WD timer setting

(1)

150

µs

tWD

Watchdog timeout period

Orderable Option TPS3435xxB

0.8

1

1.2

ms

Orderable Option TPS3435xxC

4

5

6

Orderable Option TPS3435xxD

9

10

11

Orderable Option TPS3435xxE

18

20

22

Orderable Option TPS3435xxF

45

50

55

Orderable Option TPS3435xxG

90

100

110

Orderable Option TPS3435xxH

180

200

220

Orderable Option TPS3435xxI

0.9

1

1.1

s

Orderable Option TPS3435xxJ

1.26

1.4

1.54

Orderable Option TPS3435xxK

1.44

1.6

1.76

Orderable Option TPS3435xxL

9

10

11

Orderable Option TPS3435xxM

45

50

55

Orderable Option TPS3435xxN

90

100

110

(1)

Not production tested

TPS3435

SNVSCF7A – DECEMBER 2022 – REVISED AUGUST 2024

www.ti.com

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