LTC7897 datasheet(39/53 Pages) AD

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Data Sheet

LTC7897

analog.com

Rev. A

39 of 53

When synchronized to an external clock, the LTC7897 operates in pulse-skipping mode if it is selected by the MODE

pin, or in forced continuous mode otherwise. The LTC7897 is guaranteed to synchronize to an external clock applied

to the PLLIN/SPREAD pin that swings up to at least 2.2V and down to 0.5V or less. Note that the LTC7897 can only be

synchronized to an external clock frequency within the range of 100kHz to 2.5MHz.

Efficiency Considerations

The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%.

Analyzing individual losses is useful for determining what is limiting the efficiency and which change produces the

most improvement. The percent efficiency can be expressed by Equation 29, as follows:

%Efficiency = 100% – (L1 + L2 + L3 + ...)

(29)

where L1, L2, L3, and so on are the individual losses as a percentage of input power.

Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the

losses in LTC7897 circuits: IC VIN current, DRVCC regulator current, I2R losses, and top MOSFET transition losses.

1. The VIN current is the DC supply current given in Table 1 , which excludes MOSFET driver and control

currents. Other than at light loads in Burst Mode operation, VIN current typically results in a small (<0.1%)

loss.

2. DRVCC current is the sum of the MOSFET driver and control currents. The MOSFET driver current results

from switching the gate capacitance of the power FETs. Each time a MOSFET gate is switched from low to

high to low again, a packet of charge (dQ) moves from DRVCC to GND. The resulting dQ/time duration (dt) is

a current out of DRVCC that is typically much larger than the control circuit current. In continuous mode,

gate charge current (IGATECHG) = SW frequency (fSW)(QT + QB), where QT and QB are the gate charges of the top

and bottom MOSFETs.

Supplying DRVCC from an output derived source through EXTVCC scales the VIN current required for the

driver and control circuits by a factor of VOUT/(VIN × efficiency). For example, in a 20V to 5V application,

10mA of DRVCC current results in approximately 2.5mA of VIN current. This result reduces the mid-current

loss from 10% or more (if the driver was powered directly from VIN) to only a few percent.

3. I2R losses are predicted from the DC resistances of the input fuse (if used), MOSFET, inductor, current sense

resistor, and input and output capacitor ESR. In continuous mode, the average output current flows

through L and RSENSE, but is chopped between the top and bottom MOSFETs. If the two MOSFETs have

approximately the same RDS(ON), the resistance of one MOSFET can be summed with the resistances of L,

RSENSE, and ESR to obtain the I2R losses.

For example, if each RDS(ON) = 30mΩ, RL = 50mΩ, RSENSE = 10mΩ and ESR = 40mΩ (the sum of both input and

output capacitance losses), the total resistance is 130mΩ. The resulting losses ranging from 3% to 13% as

the output current increases from 1A to 5A for a 5V output, or a 4% to 20% loss for a 3.3V output. Efficiency

varies as the inverse square of VOUT for the same external components and output power level. The

combined effects of increasingly lower output voltages and higher currents required by high performance

digital systems are not doubling, but quadrupling the importance of loss terms in the switching regulator

system.

4. Transition losses apply only to the top MOSFETs and become significant only when operating at higher

input voltages (typically 15V or greater). Transition losses can be estimated using Equation 30, as follows:

Transition Loss = 1.7(VIN)2 ∙ IL(MAX) ∙ CRSS ∙ fSW

(30)

Where CRSS is the reverse transfer capacitance.

LTC7897 Datasheet(PDF) 39 Page - Analog Devices

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