LTC7897 datasheet(13/53 Pages) AD

13 / 53 page

Data Sheet

LTC7897

analog.com

Rev. A

13 of 53

PGOOD

Power Good Open-Drain Logic Output. PGOOD is pulled to GND when the voltage on

VFB is not within ±10% of its set point.

ILIM

Current Comparator Sense Voltage Range Input. Tying ILIM to GND or INTVCC or

floating ILIM sets the maximum current sense threshold to one three different levels

(25mV, 75mV, and 50mV, respectively).

ITH

Error Amplifier Output and Switching Regulator Compensation Point. The current

comparator trip point increases with this control voltage.

VFB

Error Amplifier Feedback Input. If VPRG is floating, the VFB pin receives the remotely

sensed feedback voltage from an external resistive divider across the output. If the

VPRG pin is tied to the GND of INTVCC, the VFB pin receives the remotely sensed output

voltage directly.

SENSE+

The Positive Input to the Differential Current Comparator. The ITH pin voltage and

controlled offsets between the SENSE– and SENSE+ pins in conjunction with the

current sense resistor (RSENSE) set the current trip threshold.

SENSE–

The Negative Input to the Differential Current Comparator. The SENSE– pin supplies

current to the current comparator when SENSE- is greater than INTVCC. When SENSE– is

3.2V or greater, the pin supplies the majority of the sleep mode quiescent current

instead of VIN, further reducing the input-referred quiescent current.

DTCB

Dead Time Control Pin for Top MOSFET Off to Bottom MOSFET On Delay. Connect

DTCB to GND to program an adaptive delay of approximately 50ns. Connect DTCB to

INTVCC to program an adaptive delay of approximately 30ns. Connect a 10kΩ to 100kΩ

resistor between DTCB and GND to add a smart delay (from 13ns to 100ns) between

SW falling and BGDN rising.

DTCA

Dead Time Control Pin for Bottom MOSFET Off to Top MOSFET On Delay. Connect

DTCA to GND to program an adaptive delay of approximately 50ns. Connect DTCA to

INTVCC to program an adaptive delay of approximately 30ns. Connect a 10kΩ to 100kΩ

resistor between DTCA and GND to add a smart delay (from 13ns to 100ns)

between BGUP falling and SW rising.

DRVSET

DRVCC Regulation Program pin. This pin sets the regulation point for the DRVCC low

dropout (LDO) linear regulator. Connect to GND to set DRVCC to 6.0V. Connect to INTVCC

to set DRVCC to 9.7V. Program voltages between 5V and 10V by placing a resistor (50k to

100k) between DRVSET and GND. The resistor and an internal 20µA source current

create a voltage used by the DRVCC LDO regulator to set the regulation point.

DRVUV

DRVCC UVLO and EXTVCC Switchover Program Pin. DRVUV determines the DRVCC UVLO

and EXTVCC switchover rising and falling thresholds, as listed in Table 1.

RUN

Run Control Input for the Controller. Forcing the RUN pin below 1.1V disables control,

while forcing the RUN pin below 0.7V shuts down the entire LTC7897, reducing

quiescent current to approximately 1µA. Tie the RUN pin to VIN for always-on

operation.

GND (EPAD)

Ground (Exposed Pad). The exposed pad must be soldered to PCB GND for rated

electrical and thermal performance.

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