TPS73601DBVR datasheet(24/48 Pages) TI2

24 / 48 page

7.2.3 Application Curves (continued)

25 µs/div

200mV/div

OUT

400mA

10mA

OUT = 0 µF

FB = 10 nF

R1 = 39.2 kΩ

OUT = 10 µF

Legacy silicon

Figure 7-9. TPS73601 Load Transient, Adjustable Version

New silicon

Figure 7-10. TPS73601 Load Transient, Adjustable Version

7.3 Power Supply Recommendations

This device is designed to operate with an input supply range of 1.7V to 5.5V. If the input supply is noisy,

additional input capacitors with low ESR help improve output noise performance.

7.4 Layout

7.4.1 Layout Guidelines

To improve ac performance such as PSRR, output noise, and transient response, design the board with ground

plane connections for VIN and VOUT capacitors, and the ground plane connected at the GND pin of the device. In

addition, the ground connection for the bypass capacitor must connect directly to the GND pin of the device.

7.4.1.1 Power Dissipation

The ability to remove heat from the die is different for each package type, presenting different considerations

in the PCB layout. The PCB area around the device that is free of other components moves the heat from

the device to the ambient air. Performance data for JEDEC low- and high-K boards are shown in the Thermal

Information table. Using heavier copper increases the effectiveness in removing heat from the device. The

addition of plated through-holes to heat-dissipating layers also improves the heat-sink effectiveness.

Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product

of the output current times the voltage drop across the output pass transistor (VIN to VOUT):

+ (VIN * VOUT)

OUT

(6)

Power dissipation can be minimized by using the lowest possible input voltage necessary to provide the required

output voltage.

TPS736

SBVS038X – SEPTEMBER 2003 – REVISED MAY 2025

www.ti.com

Submit Document Feedback

Product Folder Links: TPS736

TPS73601DBVR Datasheet(PDF) 24 Page - Texas Instruments