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AD9785 Datasheet(PDF) 52 Page - Analog Devices |
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AD9785 Datasheet(HTML) 52 Page - Analog Devices |
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52 / 64 page ![]() AD9785/AD9787/AD9788 Rev. 0 | Page 52 of 64 POWER DISSIPATION Figure 74 through Figure 78 detail the power dissipation of the AD9785/AD9787/AD9788 under a variety of operating conditions. All of the graphs are taken with data being supplied to both the I and Q channels. The power consumption of the device does not vary significantly with changes in the modulation mode or analog output frequency. Graphs of the total power dissipation are shown along with the power dissipation of the DVDD18, DVDD33, and CVDD18 supplies. The power dissipation of the AVDD33 supply rail is independent of the digital operating mode and sample rate. The current drawn from the AVDD33 supply rail is typically 51 mA (182 mW) when the full-scale current of the I and Q DACs is set to the nominal value of 20 mA. Changing the full-scale current directly impacts the supply current drawn from the AVDD33 rail. For example, if the full-scale current of the I DAC and the Q DAC is changed to 10 mA each, the AVDD33 supply current drops to 31 mA. 0 0 300 250 fDATA (MSPS) 70 60 50 40 30 20 10 50 100 150 200 1× 1× NCO 2× 2× NCO 4× 4× NCO 8× 8× NCO 0 0 300 250 fDATA (MSPS) 1800 1600 1400 1200 1000 800 600 400 200 50 100 150 200 1× 1× NCO 2× 2× NCO 4× 4× NCO 8× 8× NCO Figure 76. Power Dissipation, Digital 3.3 V Supply, I and Q Data, Dual DAC Mode Figure 74. Power Dissipation, I and Q Data, Dual DAC Mode 0 0 300 250 fDATA (MSPS) 120 100 80 60 40 20 50 100 150 200 1× 1× NCO 2× 2× NCO 4× 4× NCO 8× 8× NCO 0 0 300 250 fDATA (MSPS) 1400 1200 1000 800 600 400 200 50 100 150 200 1× 1× NCO 2× 2× NCO 4× 4× NCO 8× 8× NCO Figure 77. Power Dissipation, Clock 1.8 V Supply, I and Q Data, Dual DAC Mode Figure 75. Power Dissipation, Digital 1.8 V Supply, I and Q Data, Dual DAC Mode |
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