LM4867 datasheet(16/28 Pages) NSC

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Application Information (Continued)

JMAX =PDMAX

JA +TA

(6)

Equation (6) gives the maximum junction temperature

JMAX. If the result violates the LM4867’s 150˚C, reduce the

maximum junction temperature by reducing the power sup-

ply voltage or increasing the load resistance. Further allow-

ance should be made for increased ambient temperatures.

The above examples assume that a device is a surface

mount part operating around the maximum power dissipation

point. Since internal power dissipation is a function of output

power, higher ambient temperatures are allowed as output

power or duty cycle decreases.

If the result of Equation (2) is greater than that of Equation

(3), then decrease the supply voltage, increase the load

impedance, or reduce the ambient temperature. If these

measures are insufficient, a heat sink can be added to

reduce

JA. The heat sink can be created using additional

copper area around the package, with connections to the

ground pin(s), supply pin and amplifier output pins. External,

solder attached SMT heatsinks such as the Thermalloy

7106D can also improve power dissipation. When adding a

heat sink, the

JA is the sum of

JC,

CS, and

SA.(

JC is the

junction−to−case

thermal

impedance,

the

case−to−sink

thermal

impedance,

and

the

sink−to−ambient thermal impedance.) Refer to the Typical

Performance Characteristics curves for power dissipation

information at lower output power levels.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is

critical for low noise performance and high power supply

rejection. Applications that employ a 5V regulator typically

use a 10µF in parallel with a 0.1µF filter capacitors to stabi-

lize the regulator’s output, reduce noise on the supply line,

and improve the supply’s transient response. However, their

presence does not eliminate the need for a local 1.0µF

tantalum bypass capacitance connected between the

LM4867’s supply pins and ground. Do not substitute a ce-

ramic capacitor for the tantalum. Doing so may cause oscil-

lation. Keep the length of leads and traces that connect

capacitors between the LM4867’s power supply pin and

ground as short as possible. Connecting a 1µF capacitor,

B, between the BYPASS pin and ground improves the

internal bias voltage’s stability and improves the amplifier’s

PSRR. The PSRR improvements increase as the bypass pin

capacitor value increases. Too large, however, increases

turn−on time and can compromise the amplifier’s click and

pop performance. The selection of bypass capacitor values,

especially C

B, depends on desired PSRR requirements,

click and pop performance (as explained in the section,

Proper Selection of External Components), system cost,

and size constraints.

MICRO−POWER SHUTDOWN

The voltage applied to the SHUTDOWN pin controls the

LM4867’s shutdown function. Activate micro−power shut-

down by applying V

DD to the SHUTDOWN pin. When active,

the LM4867’s micro−power shutdown feature turns off the

amplifier’s bias circuitry, reducing the supply current. The

logic threshold is typically V

DD/2. The low 0.7µA typical

shutdown current is achieved by applying a voltage that is as

near as V

DD as possible to the SHUTDOWN pin. A voltage

that is less than V

DD may increase the shutdown current.

Table 1 shows the logic signal levels that activate and deac-

tivate micro−power shutdown and headphone amplifier op-

eration. To ensure that the output signal remains

transient−free, do not cycle the shutdown function

faster than 1Hz.

There are a few ways to control the micro−power shutdown.

These include using a single−pole, single, throw switch, a

microprocessor, or a microcontroller. When using a switch,

connect an external 100k

Ω pull−up resistor between the

SHUTDOWN pin and V

DD. Connect the switch between the

SHUTDOWN pin and ground. Select normal amplifier opera-

tion by closing the switch. Opening the switch connects the

SHUTDOWN pin to V

DD through the pull−up resistor, acti-

vating micro−power shutdown. The switch and resistor guar-

antee that the SHUTDOWN pin will not float. This prevents

unwanted state changes. In a system with a microprocessor

or a microcontroller, use a digital output to apply the control

voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin

with active circuitry eliminates the pull up resistor.

Truth Table for Logic Inputs

SHUTDOWN

HP-IN

MUX CHANNEL

INPUT SELECT

OPERATIONAL MODE (MUX

INPUTCHANNEL #)

Logic Low

= −OUTB signal

Logic Low

Bridged amplifiers (1)

Logic Low

= −OUTB signal

Logic High

Bridged amplifiers (2)

Logic Low

≠ −OUTB signal

Logic Low

Single-ended amplifiers (1)

Logic Low

≠ −OUTB signal

Logic High

Single-ended amplifiers (2)

Logic High

Micro−power shutdown

HEADPHONE (SINGLE-ENDED) AMPLIFIER

OPERATION

An internal pull−up circuit is connected to the HP−IN (pin 20)

headphone amplifier control pin. When this pin is left uncon-

nected, V

DD is applied to the HP−IN. This turns off Amp2B

and switches Amp2A’s input signal from an audio signal to

the V

DD/2 voltage present on pin 14. The result is muted

bridge-connected loads. Quiescent current consumption is

reduced when the IC is in this single−ended mode.

Figure 8 shows the implementation of the LM4867’s head-

phone control function. An internal comparator with a nomi-

nal 400mV offset monitors the signal present at the −OUTB

output. It compares this signal against the signal applied to

the HP−IN pin. When these signals are equal, as is the case

when a BTL is connected to the amplifier, the comparator

forces the LM4867 to maintain bridged−amplifier operation.

When the HP−IN pin is externally floated, such as when

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