LT6105 datasheet(23/28 Pages) AD

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LT6119-1/LT6119-2

611912f

For more information www.linear.com/LT6119-1

applicaTions inForMaTion

R7canbecalculatedfromtheamplifieroutputcurrentwhich

is required to cause the comparator output to trip, IOVER.

400mV

IOVER

, Assuming R1+ R2

(

) >> R7

To ensure (R1 + R2) >> R7, R1 should be chosen such

that R1 >> R7 so that VOUTA does not change significantly

when the comparator trips.

R3 should be chosen to allow sufficient VOL and compara-

tor output rise time due to capacitive loading.

R2 can be calculated:

= R1•

VDD –390mV

VHYS(EXTRA)













Note that the hysteresis being added, VHYS(EXTRA), is in

addition to the typical 10mV of built-in hysteresis. For very

large values of R2 PCB related leakage may become an

issue. A tee network can be implemented to reduce the

required resistor values.

The approximate total hysteresis is:

VHYS =10mV+ R1•

VDD–390mV









For example, to achieve IOVER = 900µA with 50mV of total

hysteresis, R7 = 442Ω. Choosing R1 = 4.42k, R3 = 10k

and VDD = 5V results in R2 = 513k.

The analog output voltage will also be affected when the

comparator trips due to the current injected into R7 by

the positive feedback. Because of this, it is desirable to

have (R1 + R2) >> R7. The maximum VOUTA error caused

by this can be calculated as:

∆VOUTA = VDD •

+R2+R7









In the previous example, this is an error of 4.3mV at the

output of the amplifier or 43µV at the input of the amplifier

assuming a gain of 100.

Since the comparators can be used independently of the

current sense amplifier, it is useful to know the threshold

voltage equations with additional hysteresis. The input

rising edge threshold which causes the output to transi-

tion from high to low is:

VTH(R) = 400mV • 1+









The input falling edge threshold which causes the output

to transition from low to high is:

VTH(F) = 390mV • 1+









–VDD









Comparator Outputs

The comparator outputs can maintain a logic low level of

150mV while sinking 500µA. The outputs can sink higher

currents at elevated VOL levels, as shown in the Typical

PerformanceCharacteristics.Loadcurrentsareconducted

to the V– pin. The output off-state voltage may range

between 0V and 60V with respect to V–, regardless of the

supply voltage used. As with any open-drain device, the

outputs may be tied together to implement wire-OR logic

functions. The LT6119-1 can be used as a single-output

window comparator in this way.

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