AD9879BSZ datasheet(20/32 Pages) AD

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AD9879

Rev. A | Page 20 of 32

SERIAL INTERFACE FOR REGISTER CONTROL

The AD9879 serial port is a flexible, synchronous serial

communication port that allows easy interface to many

industry-standard microcontrollers and microprocessors. The

interface allows read/write access to all registers that configure

the AD9879. Single or multiple byte transfers are supported.

Also, the interface can be programmed to read words either

MSB first or LSB first. The serial interface port of the AD9879

I/O can be configured to have one bidirectional I/O (SDIO) pin

or two unidirectional I/O (SDIO/SDO) pins.

GENERAL OPERATION OF THE SERIAL INTERFACE

There are two phases to a communication cycle with the

AD9879. Phase 1 is the instruction cycle, which is the writing of

an instruction byte into the AD9879 that is coincident with the

first eight SCLK rising edges. The instruction byte provides the

AD9879 serial port controller with information regarding the

data transfer cycle, which is Phase 2 of the communication

cycle. The Phase 1 instruction byte defines whether the

upcoming data transfer is a read or write, the number of bytes

in the data transfer, and the starting register address for the first

byte of the data transfer. The first eight SCLK rising edges of

each communication cycle are used to write the instruction byte

into the AD9879.

The eight remaining SCLK edges are for Phase 2 of the

communication cycle. Phase 2 is the actual data transfer

between the AD9879 and the system controller. Phase 2 of the

communication cycle is a transfer of 1 to 4 data bytes as deter-

mined by the instruction byte. Normally, using one multibyte

transfer is the preferred method. However, single byte data

transfers are useful to reduce CPU overhead when register

access requires one byte only. Registers change immediately

upon writing to the last bit of each transfer byte.

INSTRUCTION BYTE

Table 9 illustrates the information contained in the instruction byte.

Table 9. Instruction Byte Information

MSB

LSB

R/W

The R/W bit of the instruction byte determines whether a read

or a write data transfer will occur after the instruction byte

write. Logic high indicates a read operation. Logic low indicates

a write operation. The N1:N0 bits determine the number of

bytes to be transferred during the data transfer cycle. The bit

decodes are shown in Table 10.

Table 10. Bit Decodes

Description

Transfer 1 byte

Transfer 2 bytes

Transfer 3 bytes

Transfer 4 bytes

The Bits A4:A0 determine which register is accessed during the

data transfer portion of the communication cycle. For multibyte

transfers, this address is the starting byte address. The

remaining register addresses are generated by the AD9879.

SERIAL INTERFACE PORT PIN DESCRIPTION

SCLK—Serial Clock

The serial clock pin is used to synchronize data transfers from

the AD9879 and to run the serial port state machine. The

maximum SCLK frequency is 15 MHz. Input data to the

AD9879 is sampled upon the rising edge of SCLK. Output data

changes upon the falling edge of SCLK.

CS—Chip Select

Active low input starts and gates a communication cycle. It

allows multiple devices to share a common serial port bus. The

SDO and SDIO pins go to a high impedance state when CS is

high. Chip select should stay low during the entire communica-

tion cycle.

SDIO—Serial Data I/O

Data is always written into the AD9879 on this pin. However,

this pin can be used as a bidirectional data line. The configura-

tion of this pin is controlled by Bit 7 of Register 0x00. The

default is Logic 0, which configures the SDIO pin as uni-

directional.

SDO—Serial Data Out

Data is read from this pin for protocols that use separate lines

for transmitting and receiving data. When the AD9879 operates

in a single bidirectional I/O mode, this pin does not output data

and is set to a high impedance state.

MSB/LSB TRANSFERS

The AD9879 serial port can support both MSB first or LSB first

data formats. This functionality is controlled by the LSB-first bit

in Register 0x00. The default is MSB first.

When this bit is set active high, the AD9879 serial port is in

LSB-first format. In LSB-first mode, the instruction byte and

data bytes must be written from the LSB to the MSB. In LSB-

first mode, the serial port internal byte address generator

increments for each byte of the multibyte communication cycle.

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